Systems, methods, and apparatuses for tile load, multiplication and accumulation

A system comprising:

• a memory interface;
• a plurality of cores coupled to the memory interface, one or more cores of the plurality of cores to execute program code to schedule matrix multiplication operations;
• matrix processing circuitry coupled to a memory via the memory interface, the matrix processing circuitry to execute instructions to perform the matrix multiplication operations with a first source matrix comprising a first plurality of data elements and a second source matrix comprising a second plurality of data elements, wherein the first source matrix comprises a first plurality of matrix tiles and the second source matrix comprises a second plurality of matrix tiles, each matrix tile in the first plurality of matrix tiles comprising a subset of non-overlapping data elements of the first plurality of data elements and each matrix tile in the second plurality of matrix tiles comprising a subset of non-overlapping data elements of the second plurality of data elements;
• and
• a first plurality of vector registers to store a first tile comprising a first subset of non-overlapping data elements of the first plurality of data elements, a second plurality of vector registers to store a second tile comprising a second subset of non-overlapping data elements of the second plurality of data elements, and a third plurality of vector registers to store a result matrix tile comprising a plurality of result data elements;
• the matrix processing circuitry to multiply each data element of the first subset of non-overlapping data elements with a corresponding data element of the second subset of non-overlapping data elements to generate a corresponding plurality of products, and to add one or more products of the corresponding plurality of products to a corresponding accumulation data element to generate a corresponding result data element of the plurality of result data elements of the result matrix tile, wherein tile usage of the matrix processing circuitry is to be configured by an execution of a configuration instruction prior to the matrix processing circuitry to multiply each data element of the first subset of non-overlapping data elements with a corresponding data element of the second subset of non-overlapping data elements to generate a corresponding plurality of products, and to add one or more products of the corresponding plurality of products to a corresponding accumulation data element to generate a corresponding result data element of the plurality of result data elements of the result matrix tile, wherein tile usage at least includes to configure the matrix processing circuitry to handle particular tile dimensions as determined from a configuration accessed by the execution of the configuration instruction.

A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform a plurality of operations comprising:

• scheduling matrix multiplication operations on matrix processing circuitry, wherein tile usage of the matrix processing circuitry is to be configured prior to matrix multiplication operations, wherein tile usage at least includes to configure the matrix processing circuitry to handle particular tile dimensions as determined from a configuration accessed by the execution of a configuration instruction;
• executing instructions to perform matrix multiplication operations with a first source matrix comprising a first plurality of data elements and a second source matrix comprising a second plurality of data elements, wherein the first source matrix comprises a first plurality of matrix tiles and the second source matrix comprises a second plurality of matrix tiles, each matrix tile in the first plurality of matrix tiles comprising a subset of non-overlapping data elements of the first plurality of data elements and each matrix tile in the second plurality of matrix tiles comprising a subset of non-overlapping data elements of the second plurality of data elements;
• and
• storing a first tile comprising a first subset of non-overlapping data elements of the first plurality of data elements in a first plurality of vector registers;
• storing a second tile comprising a second subset of non-overlapping data elements of the second plurality of data elements in a second plurality of vector registers;
• multiplying each data element of the first subset of non-overlapping data elements with a corresponding data element of the second subset of non-overlapping data elements to generate a corresponding plurality of products;
• and
• adding one or more products of the corresponding plurality of products to a corresponding accumulation data element to generate a corresponding result data element of a plurality of result data elements of a result matrix tile.