Graphics processor unit with opportunistic inter-path reconvergence
AssigneePurdue Research Foundation
InventorsMilind Kulkarni, Jad Hbeika
Life of this patent
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Abstract
A graphics processing unit and methods for comping and executing instructions with opportunistic inter-path reconvergence are provided. An single instruction multiple thread (SIMT) stack of graphics processing unit may store data entries, each data entry comprising an operand mask. The operand mask may include bits corresponding to threads of a warp. The graphics processing unit core may access an instruction for an entry on the SIMT stack. Each of the threads may execute the instruction using either a first set of operands or a second set of operands depending on the corresponding bits of the operand mask.
Claims5
A single instruction multiple thread (SIMT) core comprising:
- a SIMT stack configured to store data entries, each data entry comprising an operand mask, the operand mask comprising bits corresponding to threads of a warp, respectively,
- wherein the graphics processing unit core is configured to:
- access an instruction for an entry on the SIMT stack;
- execute the instruction with at least one of the threads of a warp,
- wherein each of the at least one of the threads execute the instruction using either a first set of operands or a second set of operands depending on the corresponding bits of the operand mask.
Dependencies are inferred from the claim text.