Backward compatible processing-in-memory (PIM) protocol

A memory device supporting a processing-in-memory (PIM) protocol, the memory device comprising:

• a mode register set (MRS) configured to store a first parameter code and a second parameter code in a first register and a second register, respectively, the PIM protocol comprises a plurality of PIM protocols including a first PIM protocol and a second PIM protocol,
• wherein the first parameter code comprises a PIM protocol change code indicating whether the memory device supports the first PIM protocol, and the second parameter code comprises a PIM protocol code for setting a current operation PIM protocol based on the first PIM protocol and the second PIM protocol;
• and
• a PIM circuit configured to perform an internal processing operation based on the current operation PIM protocol,
• wherein a version of the first PIM protocol is older than a version of the second PIM protocol, the first PIM protocol being a backward-compatible PIM protocol.