Region-based deterministic memory safety
AssigneeIntel Corporation
InventorsMichael LeMay, David M. Durham
Life of this patent
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Abstract
Methods and apparatus relating to techniques for region-based deterministic memory safety are described. In some embodiment, one or more instructions may be used to encrypt, decrypt, and/or check a pointer to a portion of the data stored in memory. The portion of the data is stored in a first region of the memory. The first region of the memory includes a plurality of identically sized allocation slots. Other embodiments are also disclosed and claimed.
Claims25
An apparatus comprising:
- memory to store data;
- decode circuitry to decode an instruction, the instruction to include a source operand;
- and
- execution circuitry to execute the decoded instruction according to the source operand to encrypt a pointer to a portion of the data stored in the memory, wherein the portion of the data is to be stored in a first region of the memory,
- wherein the first region of the memory includes a plurality of identically sized allocation slots, wherein each slot of the plurality of identically sized allocation slots is to store per-allocation metadata, wherein the per-allocation metadata comprises allocation type information, allocation bounds information, and a reference counter.
An apparatus comprising:
- memory to store data;
- decode circuitry to decode an instruction, the instruction to include a source operand;
- and
- execution circuitry to execute the decoded instruction according to the source operand to decrypt a pointer to a portion of the data stored in the memory,
- wherein the portion of the data is to be stored in a first region of the memory, wherein the first region of the memory includes a plurality of identically sized allocation slots, wherein each slot of the plurality of identically sized allocation slots is to store per-allocation metadata, wherein the per-allocation metadata comprises allocation type information, allocation bounds information, and a reference counter.
An apparatus comprising:
- memory to store data;
- decode circuitry to decode an instruction, the instruction to include a first operand;
- and
- execution circuitry to execute the decoded instruction according to the first operand to determine a slot for an original pointer,
- wherein the original pointer is to point to a portion of the data stored in the memory, wherein the portion of the data is to be stored in a first region of the memory, wherein the first region of the memory includes a plurality of identically sized allocation slots, wherein each slot of the plurality of identically sized allocation slots is to store per-allocation metadata, wherein the per-allocation metadata comprises allocation type information, allocation bounds information, and a reference counter.
One or more non-transitory computer-readable media comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:
- store data in memory;
- decode an instruction, the instruction to include a source operand;
- and
- execute the decoded instruction according to the source operand to encrypt a pointer to a portion of the data stored in the memory, wherein the portion of the data is to be stored in a first region of the memory, wherein the first region of the memory includes a plurality of identically sized allocation slots, wherein each slot of the plurality of identically sized allocation slots is to store per-allocation metadata, wherein the per-allocation metadata comprises allocation type information, allocation bounds information, and a reference counter.
Dependencies are inferred from the claim text.