Processor for processing external service requests using a symmetrical network interface

A computer processor capable of processing external service requests, the computer processor comprising:

• a plurality of processor cores each including a fetch unit reading and writing instructions and data, a register file with a set of registers that includes a general-purpose register and a special register, an arithmetic logic unit (ALU)/calculation unit for computation processing, a decoder/controller interpreting the instructions and generating a control signal, and a symmetric network interface having a master interface and a slave interface;
• and
• a service controller that receives a service request from another device including a homogeneous processor or as heterogeneous processor through an on-chip network, analyzes the service request, communicates with the decoder/controller of each of the plurality of processor cores to receive status of the homogeneous processor or the heterogeneous processor and to determine whether to execute the service request, requests the decoder/controller to execute the service request, and controls an operation of a designated code when the decoder/controller determines to execute the service request.