Hardware support for software event collection

A method, comprising:

• in response to an activation of a trace mode to record information associated with a program executing on a processor core, generating, by a debug circuit, a trace data stream that includes trace data collected on the executing program;
• executing, by the processor core, a particular instruction in the program that specifies a write of a data value to an architecturally visible trace register in the debug circuit;
• waiting, by the processor core, for an idle cycle in the trace data stream to insert the data value;
• and
• annotating, by the debug circuit as part of executing the particular instruction, the idle cycle in the trace data stream with the data value from the trace register.

A system, comprising:

• a memory circuit;
• a processor circuit including one or more processor cores and a debug circuit with a trace register, wherein the processor circuit is configured, to:
• in response to activation of a mode to record trace data indicative of instruction execution by the one or more processor cores, use the debug circuit to stream the trace data to the memory circuit;
• based on a determination that a particular period of time has elapsed since a previous output of a current data value stored in the trace register, use the debug circuit to insert the current data value of the trace register into the trace data stream;
• in response to execution of a particular instruction by a given one of the one or more processor cores, use the given processor core to write a data value indicated by the particular instruction to the trace register without altering an architectural state of the one or more processor cores, wherein the trace register is directly addressable by the given processor core;
• and
• in response to a determination that the data value has been written to the trace register, use the debug circuit to insert the data value from the trace register into the trace data stream.