Intelligent riser testing device and methods

A method for device testing, comprising:

• inserting a riser card into a host system between the host system and a device under test, wherein the device under test is connected through a peripheral component interconnect express (PCIe) connection;
• controlling, by the riser card, a plurality of signals to the device under test, including power and reset signals, by turning on or off one or more general purpose input output pins on the riser card;
• programmatically cycling, by the riser card, any of the plurality of signals to the device under test;
• sampling, by the riser card, power to the device under test at up to one million samples per second by measuring voltage over a precision shunt resistor and processing through an analog to digital converter;
• writing, by the riser card, the sampled power to host memory through direct memory access (DMA) such that the sampled power is accessible by the host system in synchronization with a specific test;
• controlling power sampling by the host system setting specific bits into a control register of the riser card, including:
• setting one bit in the control register that clears a specific memory buffer in host memory into which sampled power is written;
• setting a second bit in the control register to select either continuous or fast mode, wherein both continuous and fast mode write into the specific memory buffer in host memory, and when an end of the buffer is reached:
• continuous mode wraps to a beginning of the buffer and continuous writing power samples into the buffer, while fast mode stops power sampling;
• setting a third bit in the control register to select either normal or average sampling, wherein normal sampling writes every sample to memory buffer, while average sampling writes an average of consecutive samples to memory buffer;
• and
• setting a fourth bit in the control register that enables or disables power sampling;
• the host controlling tests by writing action commands to one or more action command registers or random access memory (RAM) on the riser card and specifying, within each action command:
• specific pins to enable or disable signals sent from riser card to the device under test,
• a counter specifying clock ticks until a next action, and
• an address of a next action to perform;
• and
• specifying a type in one of the action commands to control power sampling, including stop and start, instead of controlling specific pins.