PVD target design and semiconductor devices formed using the same

A physical vapor deposition (PVD) target, comprising:

• a backing plate;
• and
• a target plate coupled to the backing plate, the target plate comprising:
• a first target component, wherein the first target component comprises a first material and a dopant;
• and
• a plurality of second target components embedded and randomly distributed in the first target component, wherein the plurality of second target components comprises a second material different from the first material,
• wherein the first target component provides a sputterable surface that is sputtered during a PVD process, and the plurality of second target components is not sputtered during the PVD process.

A method for forming a semiconductor device, comprising:

• depositing a dielectric layer over a substrate;
• etching the dielectric layer to form a contact opening therein;
• positioning the substrate into a physical vapor deposition (PVD) chamber facing a PVD target, wherein the PVD target comprises:
• a backing plate;
• and
• a target plate coupled to the backing plate, the target plate comprising:
• a first layer distal from the backing plate, wherein the first layer comprises a first target component;
• and
• a second layer between the first layer and the backing plate, wherein the second layer comprises a second target component different from the first target component,
• sputtering a surface of the first layer of the PVD target to deposit a diffusion barrier layer on sidewall and bottom surfaces of the contact opening, wherein the second layer is intact;
• and
• deposing a conductive material layer on the diffusion barrier layer to fill the contact opening.