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US 12,166,485 B2Granted
Methods and circuits for slew-rate calibration
AssigneeRambus Inc.
InventorCosmin Iorga
Life of this patent
Estimating the term…
Abstract
Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.
Claims18
An integrated circuit (IC) comprising:
- an input node to receive an input signal having input-signal transitions;
- a multiphase generator coupled to the input node to receive the input-signal, the multiphase generator to issue instances of the input signal, including a first instance of the input signal of a phase offset from a second instance of the input signal;
- an oscillator to issue a clock signal of a clock frequency proportional to the phase offset;
- calibration circuitry having a calibration input coupled to the oscillator to receive the clock signal and a calibration output coupled to the multiphase generator, the calibration circuitry to adjust the phase offset between the first instance of the input signal and the second instance of the input signal responsive to the clock frequency;
- and
- a driving amplifier having amplifier input nodes coupled to the multiphase generator to receive the instances of the input signal, the driving amplifier to transmit an output signal having output-signal transitions.
3 more elements
A method for calibrating a slew rate of an output signal from an amplifier on an integrated circuit, the method comprising:
- passing an input signal through a first delay element to produce a first phase-delayed input signal and a second delay element to produce a second phase-delayed input signal;
- providing the first phase-delayed input signal and the second phase-delayed input signal to the amplifier, the amplifier to amplify the first phase-delayed input signal and the second phase-delayed input signal on the same output node to produce the output signal, wherein the slew rate of the output signal is a function of a delay between the first phase-delayed input signal and the second phase-delayed input signal;
- measuring a frequency of a signal passing through a replica delay element exhibiting a replica delay proportional to the first delay;
- and
- adjusting the delay between the first phase-delayed input signal and the second phase-delayed input signal responsive to the frequency.
2 more elements
An integrated circuit (IC) comprising:
- an input node to receive an input signal having input-signal transitions;
- means for generating instances of the input signal, including a first instance of the input signal of a phase offset from a second instance of the input signal;
- means for generating a clock signal of a clock frequency proportional to the phase offset;
- means for adjusting the phase offset between the first instance of the input signal and the second instance of the input signal responsive to the clock frequency;
- and
- a driving amplifier having amplifier input nodes coupled to the means for generating instances of the input signal, the driving amplifier to transmit an output signal having output-signal transitions responsive to the instances of the input signal.
3 more elements
Dependencies are inferred from the claim text.