Semiconductor device, memory cell including connecting structure having base portion and pillar portion, and method of forming the same

A semiconductor device, comprising:

• a first interconnect structure disposed on a substrate;
• at least one memory cell disposed on the first interconnect structure, wherein the at least one memory cell comprises:
• a bottom electrode connected to the first interconnect structure;
• a first memory element disposed on the bottom electrode;
• a connecting structure disposed on the first memory element, wherein the connecting structure comprises:
• a base portion connected to the first memory element, wherein sidewalls of the base portion are aligned with sidewalls of the first memory element;
• and
• a pillar portion protruding out from the base portion, wherein a width of the pillar portion approximate to the base portion is wider than tops of the pillar portion away from the base portion, and the pillar portion has an aspect ratio of 1:5 to 1:15;
• a selector disposed on and physically connected to the pillar portion;
• and
• a top electrode disposed on the selector;
• and
• a second interconnect structure disposed on the at least one memory cell and electrically connected to the top electrode.

A method of forming a memory cell, comprising:

• providing a bottom electrode;
• providing a memory material stack on the bottom electrode, and a connecting material on the memory material stack;
• performing a first patterning process on the connecting material to define a base portion and a pillar portion, wherein the pillar portion comprises a tapered pillar foot;
• forming a selector material on the connecting material;
• forming an electrode material on the selector material;
• and
• performing a second patterning process to pattern the memory material stack, the connecting material, the selector material and the electrode material to respectively form a memory element, a connecting structure having the base portion and the pillar portion, a selector and a top electrode, wherein the connecting structure is electrically connecting the memory element to the selector, and the pillar portion is physically connected to the selector, and
• wherein after the second patterning process, sidewalls of the base portion are aligned with sidewalls of the memory element, and the pillar portion has an aspect ratio of 1:5 to 1:15.