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US 12,120,449 B2Granted
Image capturing device and electronic apparatus with stacked chip structure
AssigneeSony Semiconductor Solutions Corporation
InventorLuonghung Asakura
Life of this patent
Estimating the term…
Abstract
An image capturing device of the present disclosure has a stacked chip structure in which at least two semiconductor chips including a first semiconductor chip and a second semiconductor chip are stacked. Pixels each including a light receiving portion are arranged on the first semiconductor chip, and a scanning section that selectively scans the pixel and a signal processing section that processes an analog signal output from the pixel are arranged on the second semiconductor chip. Further, the scanning section is arranged along pixel rows of the pixel arrangement in the matrix form.
Claims15
An image capturing device, comprising:
- a stacked chip structure in which at least two semiconductor chips are stacked, wherein the at least two semiconductor chips include a first semiconductor chip and a second semiconductor chip;
- a plurality of pixels in a two-dimensional matrix form on the first semiconductor chip, wherein each of the plurality of pixels includes a light receiving portion;
- a scanning section configured to selectively scan each of the plurality of pixels;
- a signal processing section configured to process an analog signal output from each of the plurality of pixels, wherein
- the scanning section and the signal processing section are on the second semiconductor chip, and
- the scanning section is along a plurality of pixel rows of the plurality of pixels in the two-dimensional matrix form;
- a connection portion configured to electrically connect the first semiconductor chip and the second semiconductor chip, wherein the connection portion is a copper-copper connection (Cu—Cu connection);
- and
- a pixel control line wired on the first semiconductor chip, wherein
- the pixel control line is configured to transmit a signal output from the scanning section to the of plurality pixels, and
- the pixel control line includes:
- a first path wired along a column direction of the two-dimensional matrix form,
- a second path wired along a row direction of the two-dimensional matrix form, and
- the first path is laid out in a wiring shape such that the first path is shifted in the row direction by a specific amount at a specific length interval.
11 more elements
An image capturing device, comprising:
- a stacked chip structure in which at least two semiconductor chips are stacked, wherein the at least two semiconductor chips include a first semiconductor chip and a second semiconductor chip;
- a plurality of pixels in a two-dimensional matrix form on the first semiconductor chip, wherein each of the plurality of pixels includes a light receiving portion;
- a scanning section configured to selectively scan each of the plurality of pixels;
- and
- a signal processing section configured to process an analog signal output from each of the plurality of pixels, wherein
- the scanning section and the signal processing section are on the second semiconductor chip,
- the scanning section is along a plurality of pixel rows of the plurality of pixels in the two-dimensional matrix form,
- the signal processing section includes an analog-to-digital conversion section configured to convert the analog signal output from each of the plurality of pixels into a digital signal,
- the scanning section includes a first plurality of units that includes a specific circuit as a unit of the first plurality of units,
- the analog-to-digital conversion section includes a second plurality of units that includes the specific circuit as a unit of the second plurality of units,
- the scanning section is parallel to the analog-to-digital conversion section,
- a number of the first plurality of units is proportional to a number of the plurality of pixel rows of the plurality of pixels in the two-dimensional matrix form, and
- a number of the second plurality of units is proportional to a number of a plurality of pixel columns of the plurality of pixels in the two-dimensional matrix form.
10 more elements
An electronic apparatus, comprising:
- an image capturing device that includes:
- a stacked chip structure in which at least two semiconductor chips are stacked, wherein the at least two semiconductor chips include a first semiconductor chip and a second semiconductor chip;
- a plurality of pixels in a two-dimensional matrix form on the first semiconductor chip, wherein each of the plurality of pixels includes a light receiving portion;
- a scanning section configured to selectively scan each of the plurality of pixels;
- a signal processing section configured to process an analog signal output from each of the plurality of pixels, wherein
- the scanning section and the signal processing section are on the second semiconductor chip, and
- the scanning section is along a plurality of pixel rows of the plurality of pixels in the two-dimensional matrix form;
- a connection portion configured to electrically connect the first semiconductor chip and the second semiconductor chip, wherein the connection portion is a copper-copper connection (Cu—Cu connection);
- and
- a pixel control line wired on the first semiconductor chip, wherein
- the pixel control line is configured to transmit a signal output from the scanning section to the of plurality pixels, and
- the pixel control line includes:
- a first path wired along a column direction of the two-dimensional matrix form,
- a second path wired along a row direction of the two-dimensional matrix form, and
- the first path is laid out in a wiring shape such that the first path is shifted in the row direction by a specific amount at a specific length interval.
12 more elements
Dependencies are inferred from the claim text.