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US 12,119,821 B2Granted
Semiconductor integrated circuit
AssigneeSeiko Epson Corporation
InventorYoshiyuki Yamaguchi
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor integrated circuit including an oscillation circuit configured to output an oscillation signal, a heater configured to heat the oscillation circuit, a temperature sensor configured to detect a temperature of the oscillation circuit, and a nonvolatile memory configured to store temperature correction data. The oscillation circuit controls a frequency of the oscillation signal based on an output signal of the temperature sensor and the temperature correction data.
Claims6
An oscillation circuit, comprising:
- a reference voltage circuit configured to generate a first reference voltage;
- a level shifter configured to convert frequency adjustment data and frequency correction data;
- a resistor divider configured to receive the frequency adjustment data and frequency correction data converted by the level shifter, and to generate a second reference voltage by dividing a voltage between the first reference voltage and a ground voltage according to a value of the frequency adjustment data converted by the level shifter, and a third reference voltage obtained by dividing the voltage between the first reference voltage and the ground voltage according to a value of the frequency correction data converted by the level shifter;
- a current source configured to generate a first current and a second current according to the second reference voltage;
- a first capacitor having one end to which the first current is input;
- a first comparator configured to compare a voltage of one end of the first capacitor with the third reference voltage and output a first signal;
- a second capacitor having one end to which the second current is input;
- a second comparator configured to compare a voltage of the one end of the second capacitor with the third reference voltage and output a second signal;
- a clock signal generator configured to receive the first signal and the second signal and output a clock signal, wherein
- the level shifter is further configured to convert an enable signal and a low power signal, which are oscillation control signals, into a first enable signal and a second enable signal, respectively, and to output the first enable signal and the second enable signal to the first comparator and the second comparator,
- the first comparator and the second comparator operate when the first enable signal is at a high level, and
- the first comparator and the second comparator operate with low power when the second enable signal is at a high level.
9 more elements
An oscillation circuit comprising:
- a reference voltage circuit configured to generate a first reference voltage;
- a level shifter configured to convert frequency adjustment data and frequency correction data;
- a resistor divider configured to receive the frequency adjustment data and frequency correction data converted by the level shifter, and to generate a second reference voltage by dividing a voltage between the first reference voltage and a ground voltage according to a value of the frequency adjustment data converted by the level shifter, and a third reference voltage obtained by dividing the voltage between the first reference voltage and the ground voltage according to a value of the frequency correction data converted by the level shifter;
- a current source configured to generate a first current and a second current according to the second reference voltage;
- a first capacitor having one end to which the first current is input;
- a first comparator configured to compare a voltage of one end of the first capacitor with the third reference voltage and output a first signal;
- a second capacitor having one end to which the second current is input;
- a second comparator configured to compare a voltage of the one end of the second capacitor with the third reference voltage and output a second signal;
- and
- a clock signal generator configured to receive the first signal and the second signal and output a clock signal, wherein
- the level shifter is further configured to convert an enable signal, which is an oscillation control signals, into a first enable signal, and to output the first enable signal to the first comparator and the second comparator, and
- the first comparator and the second comparator operate when the first enable signal is at a high level.
9 more elements
An oscillation circuit comprising:
- a reference voltage circuit configured to generate a first reference voltage;
- a level shifter configured to convert frequency adjustment data and frequency correction data;
- a resistor divider configured to receive the frequency adjustment data and frequency correction data converted by the level shifter, and to generate a second reference voltage by dividing a voltage between the first reference voltage and a ground voltage according to a value of the frequency adjustment data converted by the level shifter, and a third reference voltage obtained by dividing the voltage between the first reference voltage and the ground voltage according to a value of the frequency correction data converted by the level shifter;
- a current source configured to generate a first current and a second current according to the second reference voltage;
- a first capacitor having one end to which the first current is input;
- a first comparator configured to compare a voltage of one end of the first capacitor with the third reference voltage and output a first signal;
- a second capacitor having one end to which the second current is input;
- a second comparator configured to compare a voltage of the one end of the second capacitor with the third reference voltage and output a second signal;
- and
- a clock signal generator configured to receive the first signal and the second signal and output a clock signal, wherein
- the level shifter is further configured to convert a low power signal, which is an oscillation control signals, into a second enable signal, and to output the second enable signal to the first comparator and the second comparator, and
- the first comparator and the second comparator operate with low power when the second enable signal is at a high level.
9 more elements
Dependencies are inferred from the claim text.