Alternating asymmetrical phase-shift modulation
AssigneeDelta Electronics (Thailand) Public Co., Ltd.
InventorsPhilipp Rehlaender, Joachim Böcker, Roland Unruh, Frank Schafmeister
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Abstract
In order to balance the thermal stress of the switches (S1-S4) of the two legs of an inverter full bridge (4), the driving signals are generated using an up-down counter having a modulation period Tmod of twice the period T of the input voltage (Vin). The up-down counter has a first compare value (41) of D/4 and a second compare value (42) of (2+D)/4, where D is the duty cycle and where the second half bridge is phase shifted by the period T.
Claims20
A method for controlling a converter comprising an inverter full bridge with a first input terminal, a second input terminal, a first half bridge and a second half bridge connected across the first and second input terminals, wherein a input voltage having a period T is provided between the first and second input terminals, wherein each half bridge comprises a first switch and a second switch connected in series between the first and second input terminals, comprising:
- generating drive signals for the switches with a pulse width modulation technique with a duty cycle D using an up-down counter having a period Tmod being twice the period T, a first compare value for the first half bridge and a second compare value for the first half bridge,
- switching a first switch of the first half bridge ON at the first compare value for the first half bridge on an up-count of the up-down counter, switching the first switch of the first half bridge OFF at the second compare value for the first half bridge on an up-count of the up-down counter,
- switching the first switch of the first half bridge ON at the second compare value for the first half bridge on a down-count of the up-down counter, switching the first switch of the first half bridge OFF at the first compare value for the first half bridge on the down-count of the up-down counter, and
- switching a second switch of the first half bridge interleaved to the first switch of the first half bridge,
- wherein the first compare value for the first half bridge is D/4 and wherein the second compare value for the first half bridge is (2+D)/4.
A converter comprising an inverter full bridge with a first input terminal, a second input terminal, a first half bridge and a second half bridge connected across the first and second input terminals, wherein each half bridge comprises a first switch and a second switch connected in series between the first and second input terminals, a drive signal generator for generating drive signals for the switches with a pulse width modulation technique with a duty cycle D, wherein the drive signal generator comprises an up-down counter having a first compare value for the first half bridge, a second compare value for the first half bridge and a period Tmod being twice a period T of an input voltage for providing between the first and second input terminals, wherein the drive signal generator is adapted for generating drive signals for:
- switching a first switch of the first half bridge ON at the first compare value for the first half bridge on an up-count of the up-down counter, switching the first switch of the first half bridge OFF at the second compare value for the first half bridge on an up-count of the up-down counter,
- switching the first switch of the first half bridge ON at the second compare value for the first half bridge on a down-count of the up-down counter, switching the first switch of the first half bridge OFF at the first compare value for the first half bridge on the down-count of the up-down counter, and
- switching a second switch of the first half bridge interleaved to the first switch of the first half bridge,
- wherein the first compare value for the first half bridge is D/4 and wherein the second compare value for the first half bridge is (2+D)/4.
Dependencies are inferred from the claim text.