Method of manufacturing a semiconductor device and a semiconductor device

A method of manufacturing a semiconductor device, comprising:

• forming a first fin structure and a second fin structure, wherein first semiconductor layers and second semiconductor layers are alternately stacked in each of the first fin structure and the second fin structure;
• forming a first sacrificial gate structure over the first fin structure and a second sacrificial gate structure over the second fin structure;
• while the second fin structure with the second sacrificial gate structure is protected,
• etching a source/drain region of the first fin structure, which is not covered by the first sacrificial gate structure, thereby forming a first source/drain space;
• laterally etching the first semiconductor layers in the first source/drain space;
• forming a first inner spacer made of a dielectric material on an end of each of the etched first semiconductor layers;
• and
• forming a first source/drain epitaxial layer in the first source/drain space to cover the inner spacer, thereby forming a first structure;
• while the first structure is protected,
• etching the second semiconductor layers in a source/drain region of the second fin structure, which is not covered by the second sacrificial gate structure, thereby forming a second source/drain space;
• laterally etching the second semiconductor layers through the second source/drain space;
• forming a second inner spacer made of a dielectric material on an end of each of the etched second semiconductor layers;
• and
• forming a second source/drain epitaxial layer in the second source/drain space to cover the second inner spacer, thereby forming a second structure, wherein:
• the first semiconductor layers include Ge, and
• in at least one of the first semiconductor layers, a Ge concentration at a center region is smaller than a Ge concentration at edge regions along the stacked direction.

A method of manufacturing a semiconductor device, comprising:

• forming a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked;
• forming a sacrificial gate structure over the fin structure;
• etching a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a source/drain space;
• laterally etching the second semiconductor layers through the source/drain space;
• forming an inner spacer made of a dielectric material on an end of each of the etched second semiconductor layers;
• and
• forming a source/drain epitaxial layer in the source/drain space to cover the inner spacer, wherein:
• the first semiconductor layers include Ge, and
• in the at least one of the first semiconductor layers, a Ge concentration at a center region is smaller than a Ge concentration at edge regions along the stacked direction.