US 12,119,385 B2Granted

Field effect transistor

AssigneeKabushiki Kaisha Toshiba

InventorsHiro Gangi, Yasunori Taguchi, Tomoaki Inokuchi, Yusuke Kobayashi, Hiroki Nemoto

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Abstract

A semiconductor device includes a first electrode, a second electrode, a semiconductor layer that includes a first semiconductor region, a second semiconductor region, and a third semiconductor region, a third electrode, a first insulating region, a second insulating region, a fourth electrode that has a plurality of portions consecutive in a first direction, the plurality of portions including a first portion that has a first width in a second direction, a second portion that is located closer to the second electrode than the first portion in the first direction and has a second width smaller than the first width in the second direction, and a third portion that is adjacent to the second portion, located closer to the second electrode than the second portion in the first direction, and has a third width larger than the second width in the second direction, and a third insulating region.

Claims11

Dependent claims

A semiconductor device, comprising:

a first electrode;
a second electrode;
a semiconductor layer that includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, the first semiconductor region of the first conductivity type being located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode and electrically connected to the second electrode,
the second semiconductor region of a second conductivity type being located between the first electrode and the first semiconductor region in the first direction and being in contact with the first semiconductor region, and
the third semiconductor region of the first conductivity type being located between the first electrode and the second semiconductor region in the first direction and being in contact with the second semiconductor region;
a third electrode that is located between the first electrode and the first semiconductor region in the first direction and faces the second semiconductor region in a second direction intersecting the first direction;
a first insulating region that is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region;
a second insulating region that is located between the third electrode and the first electrode;
a fourth electrode that is located between the third electrode and the first semiconductor region in the first direction and that has a plurality of portions consecutive in the first direction, the plurality of portions including a first portion that has a first width in the second direction,
a second portion that is adjacent to the first portion, located closer to the second electrode than the first portion in the first direction, and has a second width smaller than the first width in the second direction, and
a third portion that is adjacent to the second portion, located closer to the second electrode than the second portion in the first direction, and has a third width larger than the second width in the second direction;
and
a third insulating region that is located between the fourth electrode and the first semiconductor region, wherein
the plurality of portions of the fourth electrode include a fourth portion that is adjacent to the first portion, located closer to the first electrode than the first portion in the first direction, and has a fourth width larger than the first width in the second direction.

11 more elements

A semiconductor device, comprising:

a first electrode;
a second electrode;
a semiconductor layer that includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, the first semiconductor region of the first conductivity type being located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode and electrically connected to the second electrode,
the second semiconductor region of a second conductivity type being located between the first electrode and the first semiconductor region in the first direction and being in contact with the first semiconductor region, and
the third semiconductor region of the first conductivity type being located between the first electrode and the second semiconductor region in the first direction and being in contact with the second semiconductor region;
a third electrode that is located between the first electrode and the first semiconductor region in the first direction and faces the second semiconductor region in a second direction intersecting the first direction;
a first insulating region that is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region;
a second insulating region that is located between the third electrode and the first electrode;
a fourth electrode that is located between the third electrode and the first semiconductor region in the first direction and that has a plurality of portions consecutive in the first direction, the plurality of portions including a first portion that has a first width in the second direction,
a second portion that is adjacent to the first portion, located closer to the second electrode than the first portion in the first direction, and has a second width smaller than the first width in the second direction, and
a third portion that is adjacent to the second portion, located closer to the second electrode than the second portion in the first direction, and has a third width larger than the second width in the second direction;
and
a third insulating region that is located between the fourth electrode and the first semiconductor region, wherein
the first width is larger than the third width.

11 more elements

A semiconductor device, comprising:

a first electrode;
a second electrode;
a semiconductor layer that includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, the first semiconductor region of the first conductivity type being located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode and electrically connected to the second electrode,
the second semiconductor region of a second conductivity type being located between the first electrode and the first semiconductor region in the first direction and being in contact with the first semiconductor region, and
the third semiconductor region of the first conductivity type being located between the first electrode and the second semiconductor region in the first direction and being in contact with the second semiconductor region;
a third electrode that is located between the first electrode and the first semiconductor region in the first direction and faces the second semiconductor region in a second direction intersecting the first direction;
a first insulating region that is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region;
a second insulating region that is located between the third electrode and the first electrode;
a fourth electrode that is located between the third electrode and the first semiconductor region in the first direction and that has a plurality of portions consecutive in the first direction, the plurality of portions including a first portion that has a first width in the second direction,
a second portion that is adjacent to the first portion, located closer to the second electrode than the first portion in the first direction, and has a second width smaller than the first width in the second direction, and
a third portion that is adjacent to the second portion, located closer to the second electrode than the second portion in the first direction, and has a third width larger than the second width in the second direction;
and
a third insulating region that is located between the fourth electrode and the first semiconductor region, wherein
a portion located closest to the first electrode in the first direction among the plurality of portions has a length L1 in the first direction and a width W1 in the second direction,
a portion adjacent to the portion located closest to the first electrode among the plurality of portions has a length L2 in the first direction and a width W2 in the second direction, and
a relationship of (W1/L1)/(W2/L2)>2.5 is satisfied.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/666,860Filed 8 Feb 2022
Priority: JP 2021-08889127 May 2021
Published: US 2022/0384587 A11 Dec 2022
Granted: 15 Oct 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 64/112
Field plates: comprising multiple field plate segments
H10D 30/668
Vertical dmos [vdmos] fets: having trench gate electrodes, e.g. UMOS transistors
H10D 64/117
Field plates: recessed field plates, e.g. trench field plates or buried field plates
H10D 64/20
Electrodes of devices having potential barriers: electrodes characterised by their shapes, relative sizes or dispositions

Family

US 2022/0384587 A1Pre-grant publication · published 1 Dec 2022
US 12,119,385 B2This patent

From the US filing history. Foreign family members aren’t listed.

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