Solid state imaging device, solid state imaging device manufacturing method, and electronic apparatus

A method of manufacturing a solid state imaging device including a semiconductor substrate that is provided with a pixel region on which a plurality of pixels is arranged in a planar manner, a wiring layer that is laminated on the semiconductor substrate and is provided with a plurality of wirings connected to the plurality of pixels, and a support substrate that is bonded to the wiring layer and supports the semiconductor substrate, the method comprising steps of:

• forming a plurality of electrode pads used to be electrically connected to an outside at positions overlapping the pixel region in the wiring layer when the semiconductor substrate is viewed in the planar manner;
• forming a plurality of through-holes at positions corresponding to selected electrode pads of the plurality of electrode pads in the support substrate;
• forming a through-electrode that is electrically and physically connected to a corresponding selected electrode pad at a bottom surface of a corresponding through-hole of the plurality of through-holes,
• wherein the plurality of through-holes are each constantly tapered from an upper surface of the support substrate through a lower surface of the support substrate into the wiring layer such that openings of each of the plurality of through-holes at the upper surface of the support substrate are larger than openings of each of the plurality of through-holes at the lower surface of the support substrate;
• and
• forming an insulation film on side surfaces of the plurality of through-holes extending into the wiring layer and on an entire surface of the upper surface of the support substrate except for where the plurality of through-holes exists.

An electronic apparatus, comprising:

• a solid state imaging device including:
• a semiconductor substrate that is provided with a pixel region on which a plurality of pixels is arranged in a planar manner;
• a wiring layer that is laminated on the semiconductor substrate and is provided with a plurality of wirings connected to the plurality of pixels;
• a support substrate that is bonded to the wiring layer and supports the semiconductor substrate,
• wherein a plurality of electrode pads used to be electrically connected to an outside is arranged at positions overlapping the pixel region in the wiring layer when the semiconductor substrate is viewed in the planar manner;
• a plurality of through-holes that are provided at positions corresponding to selected electrode pads of the plurality of electrode pads in the support substrate;
• a through-electrode that is electrically and physically connected to a corresponding selected electrode pad at a bottom surface of a corresponding through-hole of the plurality of through-holes,
• wherein the through-holes are constantly tapered from an upper surface of the support substrate through a lower surface of the support substrate into the wiring layer such that openings of the through-holes at the upper surface of the support substrate are larger than openings of the through-holes at the lower surface of the support substrate;
• and
• an insulation film formed on side surfaces of the plurality of through-holes extending into the wiring layer and on an entire surface of the upper surface of the support substrate except for where the plurality of through-holes exists.