Optical semiconductor device with integrated vias implementing inter-die connection

An optical semiconductor device, comprising:

• a logic die comprising:
• a core circuit area and a logic peripheral circuit area;
• a memory die positioned on the logic die and comprising:
• a memory cell area and a memory peripheral area;
• and
• a first inter-die via positioned in the memory peripheral area and electrically connected to the logic peripheral circuit area, wherein the first inter-die via has a back end extended to a back surface of the memory die and a front end extended through a front surface of the memory die to the logic die;
• and
• a sensor die positioned on the memory die and comprising:
• a sensor pixel area and a sensor peripheral area;
• a first intra-die via positioned in the sensor peripheral area and electrically coupled to the logic peripheral circuit area through the first inter-die via, wherein the first intra-die via has a back end extended to a back surface of the sensor die and a front end extended to a front surface of the sensor die;
• and
• a second intra-die via positioned in the sensor peripheral area, wherein the second intra-die via has a back end extended to the back surface of the sensor die and a front end extended toward the front surface of the sensor die;
• wherein a height of the first intra-die via is greater than a height of the second intra-die via,
• wherein the height of the first intra-die via is equal to a thickness of the sensor die between the front surface and the back surface thereof.