Vertical field-effect transistor with wrap-around contact structure

An integrated circuit, comprising:

• a plurality of semiconductor devices, wherein at least one of the plurality of semiconductor devices comprises a vertical field-effect transistor device comprising:
• a substrate comprising a semiconductor material;
• a first fin and a second fin each formed from the semiconductor material and extending vertically with respect to the substrate;
• gate structures disposed on the substrate and on a portion of sidewalls of the first fin and the second fin;
• spacers disposed on the gate structures and on a remaining portion of the sidewalls of the first fin and the second fin;
• a dielectric fill disposed between opposing sidewalls of the spacers and within the gate structures, wherein a top surface of outer ends of the dielectric fill is above a top-most surface of the spacers;
• source/drain regions disposed over top portions of the first fin and the second fin;
• and
• a metal liner disposed within the dielectric fill and adjacent and over the source/drain regions such that a wrap-around contact is defined to cover an upper area of the source/drain regions, wherein the wrap-around contact is isolated from the gate structures by the dielectric fill.

A method for fabricating a vertical field-effect transistor device, comprising:

• patterning a substrate comprising a semiconductor material;
• forming a first fin and a second fin each comprising the semiconductor material and extending vertically with respect to the substrate;
• forming gate structures on the substrate and on a portion of sidewalls of the first fin and the second fin;
• forming spacers on the gate structures and on a remaining portion of the sidewalls of the first fin and the second fin;
• forming a dielectric fill between opposing sidewalls of the spacers and within the gate structures, wherein a top surface of outer ends of the dielectric fill is above a top-most surface of the spacers;
• forming source/drain regions over top portions of the first fin and the second fin;
• and
• forming a metal liner within the dielectric fill and adjacent and over the source/drain regions such that a wrap-around contact is defined to cover an upper area of the source/drain regions, wherein the wrap-around contact is isolated from the gate structures by the dielectric fill.