Semiconductor circuit including a tie-low circuit and method of fabricating same

A method of protecting a circuit from parasitic noise the method comprising:

• receiving a first power supply voltage at a follower circuit, the follower circuit being coupled to a follower node, the first power supply voltage being configured to be in a first state or a second state;
• receiving a second power supply voltage at control node of a tie-low circuit coupled between the follower node and a first reference node having a ground voltage, the second power supply voltage being configured to be in a first state or a second state;
• when the second power supply voltage is in the first state, controlling the tie-low circuit to pull a voltage level at the follower node toward the ground voltage;
• when the second power supply voltage is in the second state, controlling the tie-low circuit to not pull the voltage level at the follower node toward the ground voltage;
• and
• for an anti-noise circuit coupled between the follower node and at least a second reference node having the second power supply voltage, when the second power supply voltage is in the second state, using the anti-noise circuit to protect the voltage level at the follower node from being distorted by a parasitic noise voltage which otherwise is capacitively to the follower node, the parasitic noise voltage being based on a parasitic capacitive coupling of the first power supply voltage to the follower node.

A method of fabricating a semiconductor device, the method comprising:

• forming one or more active regions in a semiconductor substrate;
• forming gate electrodes over the one or more active regions so that one or more first field effect transistors (FETs) and one or more second FETs are formed;
• and
• forming conductors and vias such that:
• the one or more first FETs are connected in a tie-low circuit;
• the one or more second FETs are connected in an anti-noise circuit;
• the tie-low circuit is connected to a follower node and is configured to receive a ground voltage and a first power supply voltage;
• the first power supply voltage is configured to exhibit at least a first state and a second state;
• the tie-low circuit is configured to pull a follower voltage toward the ground voltage in response to the first power supply voltage being in the first state and to not pull the follower voltage towards the ground voltage in response to the first power supply voltage being in the second state;
• and
• the anti-noise circuit is connected to the follower node, the anti-noise circuit is configured to protect the follower voltage at the follower node from otherwise being distorted by a noise voltage when the first power supply voltage is the second state.