Semiconductor device with multi-stacking carrier structure

A semiconductor device, comprising:

• a substrate;
• an inter-dielectric layer positioned on the substrate;
• a conductive pad positioned in the inter-dielectric layer;
• and
• a multi-stacking carrier structure comprising:
• a first tier comprising a first passivation layer positioned on the inter-dielectric layer, a first insulating layer positioned on the first passivation layer, and a first via positioned along the first passivation layer and the first insulating layer, and electrically connected to the conductive pad;
• a second tier positioned on the first tier and comprising a second passivation layer positioned on the first insulating layer, a second insulating layer positioned on the second passivation layer, and a second via positioned along the second passivation layer and the second insulating layer, and electrically connected to the first via;
• and
• a third tier positioned on the second tier and comprising a third passivation layer positioned on the second insulating layer, a third insulating layer positioned on the third passivation layer, and a third via positioned along the third passivation layer and the third insulating layer, and electrically connected to the second via;
• wherein a thickness ratio of a thickness of the multi-stacking carrier structure to a thickness of the substrate is between about 180:1 and about 50:1.