DBC substrate for power semiconductor devices, method for fabricating a DBC substrate and power semiconductor device having a DBC substrate
AssigneeInfineon Technologies Austria AG
InventorAlexander Roth
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Abstract
A DBC substrate for power semiconductor devices includes a ceramic workpiece of a non-oxide ceramic having first and second opposing main sides, the ceramic workpiece having a thickness of 10 μm or more measured between the first and second main sides, a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 μm or more, and an intermediate layer comprising Al2O3 disposed between the ceramic workpiece and the copper-containing layer.
Claims18
A DBC substrate for power semiconductor devices, the DBC substrate comprising:
- a ceramic workpiece of a non-oxide ceramic having a first main side and an opposing second main side, the ceramic workpiece having a thickness of 10 μm or more measured between the first and second main sides;
- a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 μm or more;
- and
- an intermediate layer comprising one or more monolayers of Al2O3 disposed between the ceramic workpiece and the copper-containing layer,
- wherein the intermediate layer further comprises CuAl2O4 arranged between the copper-containing layer and the one or more monolayers of Al2O3.
A method for fabricating a DBC substrate, the method comprising:
- providing a ceramic workpiece of a non-oxide ceramic having a first main side and an opposing second main side, the ceramic workpiece having a thickness of 10 μm or greater measured between the first and second main sides;
- depositing one or more aluminum-containing monolayers on at least the first main side of the ceramic workpiece by atomic layer deposition;
- and
- depositing a copper-containing layer over the one or more aluminum-containing monolayers by a direct bonded copper process,
- wherein 5 to 50 aluminum-containing monolayers are deposited.
A power semiconductor device, comprising:
- a DBC substrate comprising a ceramic workpiece of a non-oxide ceramic having a first main side and an opposing second main side, the ceramic workpiece having a thickness of 10 μm or more measured between the first and second main sides, a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 μm or more, and an intermediate layer comprising one or more monolayers of Al2O3 disposed between the ceramic workpiece and the copper-containing layer;
- and
- a power semiconductor chip disposed on the DBC substrate and electrically connected thereto,
- wherein the intermediate layer further comprises CuAl2O4 arranged between the copper-containing layer and the one or more monolayers of Al2O3.
Dependencies are inferred from the claim text.