Hybrid source drain regions formed based on same fin and methods forming same

A device comprising:

• a first isolation region;
• a second isolation region;
• a first transistor in a space between the first isolation region and the second isolation region, wherein the first transistor comprises a first semiconductor fin and a first source/drain region connected to the first semiconductor fin, wherein the first transistor is a p-type transistor;
• and
• a second transistor in the space, wherein the second transistor comprises a second semiconductor fin and a second source/drain region connected to the second semiconductor fin, wherein the second transistor is an n-type transistor.

A device comprising:

• a first isolation region and a second isolation region spaced apart from each other;
• a first semiconductor fin and a second semiconductor fin between the first isolation region and the second isolation region, wherein the first semiconductor fin and the second semiconductor fin are spaced apart from each other;
• a dielectric fin;
• a first source/drain region connected to the first semiconductor fin, wherein the first source/drain region is between the dielectric fin and the first isolation region;
• and
• a second source/drain region connected to the second semiconductor fin, wherein the second source/drain region is between the dielectric fin and the second isolation region.