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US 12,119,264 B2Granted
Non-step nanosheet structure for stacked field-effect transistors
AssigneeInternational Business Machines Corporation
InventorsShogo Mochizuki, Gen Tsutsui
Life of this patent
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Abstract
Embodiments herein include semiconductor structures that may include a first field-effect transistor (FET) stacked above a second FET in a non-step nanosheet structure, and a bottom contact electrically connected to a first bottom source/drain (S/D) of the second FET through a portion of a first top S/D of the first FET.
Claims13
A semiconductor structure, comprising:
- a first field-effect transistor (FET) stacked above a second FET in a non-step nanosheet structure, wherein the first FET comprises a nanosheet layer at least partially unconnected to the first top S/D;
- and
- a bottom contact electrically connected to a first bottom source/drain (S/D) of the second FET through a portion of a first top S/D of the first FET.
A semiconductor structure, comprising:
- a top field-effect transistor (FET), comprising:
- a top nanosheet;
- and
- a top source/drain (S/D), wherein the top nanosheet is wider than the top S/D;
- a bottom FET, comprising:
- a bottom nanosheet;
- and
- a bottom S/D, wherein the bottom nanosheet has a same width as the top nanosheet, and the bottom S/D is wider than the top S/D;
- and
- a bottom contact electrically connected to the bottom S/D through a portion of a first top S/D of the first FET.
7 more elements
Dependencies are inferred from the claim text.