Semiconductor bonding structures and methods
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Tse Chen, Hsiu-Jen Lin, Wei-Hung Lin, Kuei-Wei Huang, Ming-Da Cheng, Chung-Shi Liu
Life of this patent
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Abstract
A system and method for applying an underfill is provided. An embodiment comprises applying an underfill to a substrate and patterning the underfill. Once patterned other semiconductor devices, such as semiconductor dies or semiconductor packages may then be attached to the substrate through the underfill, with electrical connections from the other semiconductor devices extending into the pattern of the underfill.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- removing a first portion of an underfill material to form a first opening exposing a first portion of a substrate, the first opening having a first width and a first depth;
- removing a second portion of the underfill material to form a second opening exposing a second portion of the substrate, the second opening having a second width and a second depth, the second width being different from the first width, the second depth being the same as the first depth, wherein the removing the first portion of the underfill material and the removing the second portion of the underfill material are performed simultaneously, and wherein after removing the first portion of the underfill material and the second portion of the underfill material, the remaining portion of the underfill material has a planar top surface;
- after the removing the first portion of the underfill material, placing a first external connector into physical contact with the first portion of the substrate, the first external connector having a third width;
- and
- after the removing the second portion of the underfill material, bonding a first package to the substrate by placing a second external connector into physical contact with the second portion of the substrate, the second external connector having a fourth width larger than the third width, wherein a continuous flat top surface of the underfill material between the first external connector and the second external connector is exposed while bonding the first package by placing the second external connector.
A method of manufacturing a semiconductor device, the method comprising:
- applying an underfill material to a substrate;
- patterning the underfill material to form a first opening through the underfill material and a second opening through the underfill material, wherein the patterning the underfill to form the first opening and the second opening are performed simultaneously, wherein the first opening has a first width, the second opening has a second width, and the first width is different from the second width, wherein the first opening has a first depth, the second opening has a second depth, and the second depth is the same as the first depth, wherein the patterning the underfill material removes material of the underfill material to expose the substrate;
- and
- after the patterning the underfill material, bonding a first semiconductor die to the substrate through the first opening and bonding a first package to the substrate through the second opening, wherein bonding the first package to the substrate comprises forming a first external connector in physical contact with the substrate and with the first package, wherein the first external connector comprises a first material extending from a bottom surface of the second opening to a bottom surface of the first package, wherein a portion of a continuous sidewall of the first external connector is free of contact with the underfill material, and wherein a top surface of the underfill material adjacent the second opening is exposed while bonding the first package to the substrate.
A method of manufacturing a semiconductor device, the method comprising:
- laminating an underfill material onto a substrate, wherein after the laminating the underfill material the entirety of the underfill material has an uppermost planar surface facing away from the substrate;
- removing a first portion of the underfill material to form a first opening exposing a first portion of a substrate, the first opening having a first width and a first depth;
- after the removing the first portion of the underfill material, bonding a first semiconductor die to the substrate with a first external connector;
- removing a second portion of the underfill material to form a second opening exposing a second portion of a substrate, the second opening having a second width and a second depth;
- the second width being different from the first width, the second depth being the same as the first depth, wherein removing the first portion of the underfill material and removing the second portion of the underfill material are performed simultaneously;
- and
- after the laminating the underfill material, bonding a first package to the substrate with a second external connector, the first external connector having a third width, the second external connector having a fourth width larger than the third width, wherein the second external connector physically contacts a top surface of the substrate and a bottom surface of the first package, wherein the second external connector comprises a first material extending from the top surface of the substrate to the bottom surface of the first package, wherein a sidewall of the second external connector is partially exposed from the underfill material, and wherein the uppermost planar surface of the underfill material is exposed while bonding the first package to the substrate.
Dependencies are inferred from the claim text.