Drive circuit, method for driving drive circuit, and memory

A memory, comprising a drive circuit and a bank, the bank comprising one or a plurality of memory cells, the drive circuit comprising:

• a word line drive circuit, comprising an input terminal and an output terminal and configured to provide an output signal to the output terminal according to an input signal received by the input terminal, the word line drive circuit comprising at least one N-type transistor;
• and
• a first control circuit, configured to pull down, in response to the input signal being a first control signal, a voltage of a substrate terminal of the at least one N-type transistor to reduce a leakage current of the at least one N-type transistor;
• wherein the first control circuit comprises a second P-type transistor, and the second P-type transistor comprises a gate electrode connected to the input terminal of the word line drive circuit, a first electrode connected to the substrate terminal of the at least one N-type transistor and a second electrode connected to a third signal terminal,
• wherein the third signal terminal is configured to provide a third voltage in a case where the second P-type transistor is turned on;
• in a case where a running state of the bank is a bank active state, the first control circuit pulls down the voltage of the substrate terminal of the at least one N-type transistor in the word line drive circuit.