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US 12,119,055 B2Granted
Memory device architecture
AssigneeMicron Technology, Inc.
InventorsHernan A. Castro, Everardo Torres Flores, Jeremy M. Hirst
Life of this patent
Estimating the term…
Abstract
Row electrode drivers and column electrode drivers for a memory device are distributed within a footprint share by a memory cell array.
Claims18
A method, comprising:
- forming a memory array comprising a plurality of sub array regions across a footprint of the memory array;
- forming a plurality of first electrode drivers distributed across the footprint of the memory array in a plurality of disjointed first electrode driver regions;
- and
- forming a plurality of second electrode drivers of a same type as the plurality of first electrode drivers and distributed across the footprint in a plurality of disjointed second electrode driver regions such that the plurality of first electrode drivers are oriented in a first direction and the plurality of second electrode drivers are oriented in a second direction perpendicular to the first direction, such that at least a portion of one of the plurality of disjointed first electrode driver regions and at least a portion of one of the plurality of disjointed second electrode driver regions are within each sub array region of the plurality of sub array regions, wherein each disjointed first electrode driver region of the plurality of disjointed first electrode driver regions within each sub array region spans less than a length of each corresponding sub array region.
1 more element
A memory system, comprising:
- processing circuitry, wherein the processing circuitry is configured to cause the memory system to:
- form a memory array comprising a plurality of sub array regions across a footprint of the memory array;
- form a plurality of first electrode drivers distributed across the footprint of the memory array in a plurality of disjointed first electrode driver regions;
- and
- form a plurality of second electrode drivers of a same type as the plurality of first electrode drivers and distributed across the footprint in a plurality of disjointed second electrode driver regions such that the plurality of first electrode drivers are oriented in a first direction and the plurality of second electrode drivers are oriented in a second direction perpendicular to the first direction, such that at least a portion of one of the plurality of disjointed first electrode driver regions and at least a portion of one of the plurality of disjointed second electrode driver regions are within each sub array region of the plurality of sub array regions, wherein each disjointed first electrode driver region of the plurality of disjointed first electrode driver regions within each sub array region spans less than a length of each corresponding sub array region.
2 more elements
A memory device, comprising:
- a memory array comprising a plurality of sub array regions across a footprint of the memory array;
- a plurality of first electrode drivers distributed across the footprint of the memory array in a plurality of disjointed first electrode driver regions;
- and
- a plurality of second electrode drivers of a same type as the plurality of first electrode drivers and distributed across the footprint in a plurality of disjointed second electrode driver regions such that the plurality of first electrode drivers are oriented in a first direction and the plurality of second electrode drivers are oriented in a second direction perpendicular to the first direction, such that at least a portion of one of the plurality of disjointed first electrode driver regions and at least a portion of one of the plurality of disjointed second electrode driver regions are within each sub array region of the plurality of sub array regions, wherein each disjointed first electrode driver region of the plurality of disjointed first electrode driver regions within each sub array region spans less than a length of each corresponding sub array region.
1 more element
Dependencies are inferred from the claim text.