Signal synchronization adjustment method and signal synchronization adjustment circuit

A signal synchronization adjustment method, for applying to data reading according to a reference clock signal between a memory controller and a dynamic random access memory in an electronic device, wherein a cycle of the reference clock signal is one time cycle, the method comprises:

• a controlling step that the memory controller triggers a command signal to the dynamic random access memory, the command signal includes a first command, a second command, a third command and a fourth command, and the memory controller stops controlling the dynamic random access memory;
• a column selection signal triggering step that after the third command is generated, the dynamic random access memory delays for a column selection signal latency time according to a first rising edge of the reference clock, and then triggers a column selection signal;
• an internal data strobe signal triggering step that the dynamic random access memory delays for an internal data strobe signal latency time, and then triggers an internal data strobe signal;
• an external data strobe signal triggering step that the dynamic random access memory delays for an external data strobe signal latency time, and then triggers an external data strobe signal.