Scan circuit and display apparatus

A scan circuit, comprising a first control signal driving circuit, a second control signal driving circuit, and a third control signal driving circuit;

• wherein, in a first region, the first control signal driving circuit comprises L stages, L being an integer ≥1;
• in a second region, the second control signal driving circuit comprises M1 stages and the third control signal driving circuit comprises M2 stages, M1 being an integer ≥1, M2 being an integer ≥1;
• in a third region, the first control signal driving circuit comprises N1 stages, the second control signal driving circuit comprises N2 stages, and the third control signal driving circuit comprises N3 stages, N1 being an integer ≥2, N2 being an integer ≥2, N3 being an integer ≥2;
• and
• the first region, the second region, and the third region surround a first portion, a second portion, and a third portion of a perimeter of a display region, respectively, the first portion, the second portion, and the third portion being at least partially non-overlapping.