Multi-threading processor and operating method thereof

An operating method of a multi-threading processor comprising a cache including a memory and a controller, and a core electrically connected to the cache and configured to simultaneously execute and manage a plurality of threads, the method comprising:

• determining, by the core, an occurrence of a data hazard for the plurality of threads and stalling operations of the plurality of threads;
• receiving from the cache, by the core, hint information instructing a first thread of the plurality of threads to operate;
• and
• initiating, by the core, an operation of the first thread based on the hint information while the data hazard for the plurality of threads is maintained,
• wherein the receiving the hint information includes:
• transferring, by the core, a data access request including address information to the cache;
• and
• searching, by the controller of the cache, a cache tag based on the address information to determine whether data corresponding to the address information is stored in the memory, and transferring the hint information to the core in response to determining that the data corresponding to the address information is stored in the memory.