Ripple carry adder with inverted ferroelectric or paraelectric based adders

An apparatus comprising:

• a ripple carry adder comprising alternating adders, wherein the alternating adders include:
• a first 1-bit adder with inverted carry output and inverted sum output, and
• a second 1-bit adder with inverted carry input and inverted operands,
• wherein the inverted carry output is coupled to the inverted carry input;
• and
• an inverter coupled to the inverted sum output of the first 1-bit adder, wherein the alternating adders include majority or minority gates, wherein an individual majority or minority gate includes at least three capacitors, wherein first terminals of the at least three capacitors are directly connected without magnets to at least three inputs of the individual majority or minority gate, wherein second terminals of the at least three capacitors are directly connected without magnets to a node, and wherein the at least three capacitors include non-linear polar material.

A system comprising:

• a processor circuitry to execute one or more instructions;
• a communication interface communicatively coupled to the processor circuitry;
• and
• a memory coupled to the processor circuitry, wherein the processor circuitry includes:
• a ripple carry adder comprising alternating adders, wherein the alternating adders include:
• a first 1-bit adder with inverted carry output and inverted sum output, and
• a second 1-bit adder with inverted carry input and inverted operands, wherein the inverted carry output is coupled to the inverted carry input, wherein the alternating adders include majority or minority gates, wherein an individual majority or minority gate includes at least three capacitors, wherein first terminals of the at least three capacitors are directly connected without magnets to at least three inputs of the individual majority or minority gate, wherein second terminals of the at least three capacitors are directly connected without magnets to a node, and
• wherein the at least three capacitors include non-linear polar material;
• and
• an inverter coupled to the inverted sum output of the first 1-bit adder.