Systems and methods for analog integrated circuits (IC) design using quantum evolution algorithms (QEAs)

A computer system for designing and simulating an electrical circuitry, comprising:

• a CAD/CAE/EDA module operable to assisting in a design and a simulation of said electrical circuitry;
• and
• a quantum emulator module, electrically coupled to said CAD/CAE/EDA module, operable, to perform the following steps:
• (a) determining types and number of parameters to be optimized and their respective upper boundaries (UB) and lower boundaries (LB) in either binary or decimal formats for said electrical circuitry using said CAD/CAE/EDA module;
• and
• (b) optimizing said parameters in qubit formats using a quantum evolution optimization module constrained by said UB and said LB, wherein said quantum emulator module further comprises said quantum evolution optimization module, wherein said optimizing said parameters further comprises:
• (j) initializing an initial quantum population based on said types and number of said parameters;
• measuring said initial quantum population by collapsing each of said qubits in said quantum population into a binary string (x11, x21, x31 . . . xj,1)1, (x12, x22, x32 . . . xj,2)2, . . . , (x1i, x2i, x3i . . . xj,i)i, . . . , (x1m, x2m, x3m . . . xj,m)m with xj,i∈{0;
• 1};
• and
• decoding said binary string by applying a predetermined formula to said binary string, said predetermined formula is defined as
• value
• =
• LB
• +
• decimal
• 2
• j
• ×
• (
• UB
• -
• LB
• )
• ,
• wherein a value is a magnitude of each of said parameter to be optimized in a real number domain {R} and a decimal is an unsigned decimal number of said binary string, and wherein j is a total number of bits in said binary string.