Memory system in which a host and a controller store a command and a response to the command by using a circular queue
AssigneeSK hynix Inc.
InventorIn Jong Jang
Life of this patent
Estimating the term…
Abstract
A memory system may include: a memory device including a plurality of memory cells, and a controller including: an internal reception queue suitable for queueing a command queued in an external transmission queue, the command being externally provided to the controller, and an internal transmission queue suitable for queueing a response to the command, the response being transmitted from the controller and to be queued in an external reception queue, wherein the controller is suitable for controlling the memory device on the basis of the command to generate the response.
Claims20
A memory system comprising:
- a memory device;
- and
- a controller including:
- an internal reception queue configured to queue a command queued in an external transmission queue of a host, the command being provided to the controller from the host;
- and
- an internal transmission queue suitable for queueing a response to the command, the response being transmitted from the controller to the host and to be queued in an external reception queue of the host,
- wherein the controller is configured to control the memory device based on the command to generate the response,
- wherein the controller is further configured to:
- compare, addresses of a head area each included in the external transmission queue and the internal reception queue,
- compare, when the addresses of the head areas coincide with each other in the external transmission queue and the internal reception queue, commands queued in a command area each included in the external transmission queue and the internal reception queue, and
- reset each of the internal transmission queue and the external reception queue, when the commands queued in the command areas do not coincide with each other in the external transmission queue and the internal reception queue or the addresses of a head areas do not coincide with each other in the external transmission queue and the internal reception queue.
An operating method of a memory system, the operating method comprising:
- receiving a command queued in an external transmission queue of a host, the command being provided to the memory system from the host;
- queueing the command in an internal reception queue;
- transmitting a response to the command to the host, the response to be queued in an external reception queue of the host;
- queueing the response to the command in an internal transmission queue;
- comparing, addresses of a head area each included in the external transmission queue and the internal reception queue;
- comparing, in response to the addresses of the head areas coinciding with each other in the external transmission queue and the internal reception queue, commands queued in a command area each included in the external transmission queue and the internal reception queue, and
- resetting each of the internal transmission queue and the external reception queue, in response to the commands queued in the command areas not coinciding with each other in the external transmission queue and the internal reception queue or addresses of a head area not coinciding with each other in the external transmission queue and the internal reception queue.
Dependencies are inferred from the claim text.