Memory and apparatus comprising same
AssigneeAnhui Cambricon Information Technology Co., Ltd.
InventorsJunwei Zhang, Jingye Xuan, Shangbin Chen
Life of this patent
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Abstract
A memory is included in a combined processing apparatus which may include a computing device, a general interconnection interface, and another processing device. The computing device interacts with the other processing device to jointly complete a computing operation specified by a user. A storage device is respectively connected to the computing device and the other processing device, and is configured to store data of the computing device and the other processing device. The solution of the present disclosure can be widely applied to various data storage fields.
Claims10
A memory, comprising:
- two dies (D1, D2) with respective on-die terminations (ODT1, ODT2), and a communication path provided between the two dies (D1, D2);
- wherein one of the two dies is a target die (T-D), and the on-die termination (ODT1, ODT2) of the target die (T-D) is a target on-die termination (T-ODT);
- the other is a non-target die (NT-D), and the on-die termination (OTD2, ODT1) of the non-target die (NT-D) are a non-target on-die termination (NT-ODT);
- and an operation mode of the target die (T-D) includes a read mode and a write mode;
- and
- the target die (T-D) sends a notification signal to the non-target die (NT-D) through the communication path to notify the non-target die (NT-D) of the operation mode of the target die (T-D), wherein the non-target die (NT-D) is configured to, in response to receiving the notification signal from the target die (T-D) and depending on different operation modes of the target die (T-D), set the non-target on-die termination (NT-ODT) to different resistance values;
- wherein the notification signal is a step signal including a front step edge and a back step edge, the step signal is sent in the read mode, in which the front step edge of the step signal occurs before the start of data transmission in the read mode of the target die (T-D), and the back step edge occurs after the end of data transmission in the read mode of the target die (T-D).
A storage method performed on a memory, wherein the memory comprises two dies (D1, D2) with respective on-die terminations (ODT1, ODT2), and a communication path is provided between the two dies (D1, D2);
- wherein one of the two dies is a target die (T-D), and the on-die termination (ODT1, ODT2) of the target die (T-D) is a target on-die termination (T-ODT);
- the other is a non-target die (NT-D), and the on-die termination (OTD2, ODT1) of the non-target die (NT-D) are a non-target on-die termination (NT-ODT);
- and an operation mode of the target die (T-D) includes a read mode and a write mode;
- and
- the method comprises:
- sending a notification signal to the non-target die (NT-D) through the communication path to notify the non-target die (NT-D) of the operation mode of the target die (T-D),
- wherein in response to receiving the notification signal from the target die (T-D) and depending on different operation modes of the target die (T-D), the non-target die (NT-D) sets the non-target on-die termination (NT-ODT) to different resistance values;
- wherein the notification signal is a step signal including a front step edge and a back step edge, the step signal is sent in the read mode, in which the front step edge of the step signal occurs before the start of data transmission in the read mode of the target die (T-D), and the back step edge occurs after the end of data transmission in the read mode of the target die (T-D).
Dependencies are inferred from the claim text.