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US 12,118,220 B2Granted
Elastic persistent memory regions
AssigneeMicron Technology, Inc.
InventorsJoseph H. Steinmetz, Luca Bert, William Akin
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Abstract
A system includes a memory and at least one processing device, operatively coupled to the memory, to perform operations including causing a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device. The PMR utilizes a power protection mechanism to prevent data loss in an event of power loss.
Claims18
A system comprising:
- a memory;
- and
- at least one processing device, operatively coupled to the memory, to perform operations comprising:
- causing a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device, wherein the PMR utilizes a power protection mechanism to prevent data loss in an event of power loss;
- and
- managing PMR caching with respect to the PMR by using a caching mechanism that manages page eviction based on a set of key registers.
3 more elements
A method comprising:
- causing, by a processing device, a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device, wherein the PMR utilizes a power protection mechanism to prevent data loss in an event of power loss;
- and
- managing, by the processing device, PMR caching with respect to the PMR by using a caching mechanism that manages page eviction based on a set of key registers.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- causing a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device, wherein the PMR utilizes a power protection mechanism to prevent data loss in an event of power loss;
- and
- managing, by the processing device, PMR caching with respect to the PMR by using a caching mechanism that manages page eviction based on a set of key registers.
Dependencies are inferred from the claim text.