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US 12,117,935 B2Granted
Technique to enable simultaneous use of on-die SRAM as cache and memory
AssigneeAdvanced Micro Devices, Inc.
InventorsChintan S. Patel, Vydhyanathan Kalyanasundharam, Benjamin Tsien, Alexander J. Branover
Life of this patent
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Abstract
A technique for operating a cache is disclosed. The technique includes utilizing a first portion of a cache in a directly accessed manner; and utilizing a second portion of the cache as a cache.
Claims21
A method for operating a cache, the method comprising:
- utilizing a first portion of the cache as a cache;
- and
- reconfiguring a first sub-portion of the first portion to be accessed directly, the reconfiguring including invalidating entries of the first sub-portion.
A system, comprising:
- a cache;
- and
- a processor configured to access data stored in the cache,
- wherein the cache is configured such that the accesses from the processor utilize a first portion of the cache as a cache,
- wherein the processor is configured to:
- switch a first sub-portion of the first portion to being used in a directly accessed manner, the switching including invalidating entries of the first sub-portion.
3 more elements
A system, comprising:
- a cache;
- and
- a plurality of clients configured to access data stored in the cache,
- wherein the cache is configured such that the accesses from the plurality of clients utilize a first portion of the cache as a cache,
- wherein the cache is configured to:
- switch a first sub-portion of the first portion to being used in a directly access manner, the switching including invalidating entries of the first sub-portion.
3 more elements
Dependencies are inferred from the claim text.