Method and system for sharing memory between processors by updating shared memory space including funtionality to place processors into idle state
AssigneeATI Technologies ULC
InventorDror Smolarsky
Life of this patent
Estimating the term…
Abstract
A method and system for sharing memory in a computer system includes placing one or more processors in the computer system in an idle state. The one or more processors are queried for associated memory space, and a shared physical memory address space is updated, wherein each processor in the system has access to the physical memory in the shared physical memory address space. The one or more processors is removed from the idle state, and work is submitted to the one or more processors for execution.
Claims20
A method for sharing memory in a computer system, comprising:
- placing one or more processors in the computer system in an idle state;
- querying the one or more processors for an invisible memory associated with each of the one or more processors;
- updating a shared physical memory address space to include the invisible memory associated with at least one of the one or more processors wherein data stored in the shared physical memory address space is accessible to each of the one or more processors;
- removing the one or more processors from the idle state upon performing the updating of the shared physical memory address space;
- and
- submitting work to the one or more processors for execution.
A computer system, comprising:
- a memory;
- one or more processors communicatively coupled to and the memory, each processor including a processor specific memory;
- and
- a first processor communicatively coupled to the one or more processors, wherein the first processor is configured to:
- place the one or more processors in an idle state;
- query the one or more processors for invisible memory associated with each of the one or more processors;
- update a shared physical memory address space to include the invisible memory associated with at least one of the one or more processors, wherein data stored in the shared physical memory address space is accessible to each of the one or more processors;
- remove the one or more processors from the idle state upon updating of the shared physical memory address space;
- and
- submit work to the one or more processors for execution.
A non-transitory computer-readable medium for sharing memory, the non-transitory computer-readable medium having instructions recorded thereon, that when execute by a processor, cause the processor to perform operations including:
- placing one or more processors in a computer system in an idle state;
- querying the one or more processors for an invisible memory associated with each of the one or more processors;
- updating a shared physical memory address space to include the invisible memory associated with at least one of the one or more processors, wherein data stored in the shared physical memory address space is accessible to each of the one or more processors;
- removing the one or more processors from the idle state upon performing the updating of the shared physical memory address space;
- and
- submitting work to the one or more processors for execution.
Dependencies are inferred from the claim text.