Slave device and host device
AssigneePanasonic Intellectual Property Management Co., Ltd.
InventorsTadashi Ono, Yoshihisa Inagaki
Life of this patent
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Abstract
When a host-slave system including a host device and a slave device transitions to a power-down mode, the host device drives a CMD line in order of a high level, a low level, and a high level, and stops supplying a clock signal after a predetermined time elapses. During a power-down mode period, the slave device stops supplying a power to a back-end module. When the host device resumes the supply of the clock signal, the host-slave system returns from the power-down mode.
Claims17
A slave device that is connected to a host device via a plurality of signal lines including a first signal line and a second signal line, comprising:
- a controller;
- and
- a back-end module, wherein:
- in a case where the slave device is in a first mode in which a clock signal supplied from the host device is received via the first signal line and a power supplied from the host device is supplied to both the controller and the back-end module, when the controller receives a first predetermined signal pattern via the second signal line and does not receive the clock signal via the first signal line, the slave device transitions to a second mode in which the power supplied to the back-end module is stopped, and
- in a case where the slave device is in the second mode, when the controller receives the clock signal via the first signal line, the slave device transitions to the first mode and transmits a second predetermined signal pattern via the second signal line.
A host device that is connected to a slave device via a plurality of signal lines including a first signal line and a second signal line, comprising:
- a controller;
- and
- a power supply unit that supplies a power to the slave device, wherein:
- in a first mode in which the power is supplied to the slave device via a power supply line by the power supply unit and a clock signal is supplied via the first signal line from the controller, after the controller transmits a first predetermined signal pattern via the second signal line, the host device transitions to a second mode in which the clock signal is not supplied from the controller via the first signal line, and
- in the second mode, after the controller supplies the clock signal via the first signal line and receives a second predetermined signal pattern via the second signal line, the host device transmits a signal to the slave device.
Dependencies are inferred from the claim text.