Semiconductor memory device having bit lines and isolation fins disposed on the substrate

A semiconductor memory device, comprising:

• a substrate, comprising a plurality of active areas and a shallow trench isolation;
• a plurality of buried word lines disposed in the substrate, wherein each of the buried word lines comprises an interface dielectric layer, a gate dielectric layer, a gate electrode layer, and a mask layer;
• a plurality of bit lines disposed on the substrate;
• and
• a plurality of isolation fins disposed on the substrate, over each of the buried word lines respectively, wherein a portion of the isolation fins is disposed under the bit lines and overlapped with the bit lines, wherein a height of the isolation fins disposed over the active areas is smaller than a height of the isolation fins disposed over the shallow trench isolation.

A semiconductor memory device, comprising:

• a substrate, comprising a plurality of active areas and a shallow trench isolation;
• a plurality of buried word lines disposed in the substrate;
• a plurality of bit lines disposed on the substrate;
• and
• a plurality of isolation fins disposed on the substrate, over each of the buried word lines respectively, wherein the isolation fins comprise different heights in a direction perpendicular to the substrate and a portion of the isolation fins is disposed under the bit lines and overlapped with the bit lines.