Integrated circuit device

An integrated circuit device comprising:

• a substrate including a plurality of active regions;
• a bit line extending on the substrate in a horizontal direction and connected to a first active region selected from the plurality of active regions;
• a buried contact plug connected to a second active region adjacent to the first active region among the plurality of active regions and including a conductive semiconductor layer buried in the substrate;
• a conductive landing pad extending toward the buried contact plug in a vertical direction, having a sidewall facing the bit line, and including a metal;
• and
• a spacer structure between the bit line and the conductive landing pad,
• wherein the spacer structure includes an outer insulating spacer in contact with the sidewall of the conductive landing pad and spaced apart from the buried contact plug.

An integrated circuit device comprising:

• a substrate including a plurality of active regions spaced apart from each other;
• a first bit line and a second bit line spaced apart from each other on the substrate in a first horizontal direction and extending in a second horizontal direction perpendicular to the first horizontal direction;
• a plurality of buried contact plugs arranged in a line between the first bit line and the second bit line in the second horizontal direction and including a plurality of conductive semiconductor layers buried in the substrate;
• a plurality of insulating fences arranged one by one between the plurality of buried contact plugs between the first bit line and the second bit line;
• a direct contact electrically connecting a first active region selected from the plurality of active regions and the first bit line;
• a plurality of conductive landing pads respectively extending toward the plurality of buried contact plugs in a vertical direction, having a first sidewall facing the first bit line and a second sidewall facing the second bit line in the first horizontal direction, and including a metal;
• and
• a first spacer structure between the first bit line and the plurality of conductive landing pads and a second spacer structure between the second bit line and the plurality of conductive landing pads,
• wherein the first and second spacer structures include respective outer insulating spacers in contact with the plurality of conductive landing pads and spaced apart from the plurality of buried contact plugs.