High voltage gate drive circuitry

A configurable printed wiring board (PWB) for a power switching transistor device gate drive system, the PWB comprising:

• a plurality of gate driver controls and associated power supply units at predetermined locations thereon, a respective gate driver control and associated power supply unit combination operable for independently driving a corresponding switching power transistor device operatively connected therewith to provide power to a connected load, each respective gate driver control and associated power supply unit combination having associated circuit topology located on said PWB such that, in a first PWB configuration, each respective gate driver control and power supply unit combination is electrically high voltage isolated for independently driving a corresponding connected switching power transistor device;
• and
• multiple pairs of connection structures integrated within the PWB at predetermined locations of circuitry associated with each respective gate driver control and associated power supply unit combination, each connection structure of a respective pair accommodating physical installation of a terminal of a resistor device on said PWB,
• wherein a first pair of connection structures permits a populating of a resistor component to electrically connect a power rail conductor associated with a first power supply unit to a like power rail conductor associated with a second power supply unit, and
• a second pair of connection structures permits a populating of a resistor component to electrically connect a conductor carrying a gate driver signal of a first gate driver control circuit used to control a first switching power transistor to a like conductor associated with a second gate driver control circuit for carrying a gate drive signal for controlling switching operation of corresponding connected second switching power transistor;
• wherein each said first and second paired connection structures when populated with a respective resistor component configure a second PWB configuration comprising a parallel connection of said first switching power transistor device and second switching power transistor device to drive the load and permit said first and second power supply units to thereby share current for driving the parallel configured switching power transistor devices associated with each first and second power supply unit.