End-to-end hardware acceleration for ZKP from witness generation to proof generation

A cryptographic engine comprising:

• a witness generator;
• a proof generator;
• and
• a local witness buffer;
• wherein the local witness buffer is integrated with the witness generator and the proof generator on the cryptographic engine and the local witness buffer is separate from host memory accessed by a host processor operating with the cryptographic engine in a proving computing system;
• wherein the cryptographic engine combines the witness generator, the proof generator and the local witness buffer into a semiconductor device, the cryptographic engine is separate from the host processor;
• wherein the witness generator in the cryptographic engine (a) receives, from the host processor, compiled code of a cryptographic program and specific input to the cryptographic program, (b) executes the cryptographic program by way of executing the compiled code, (c) records specific output generated from the cryptographic program, intermediate variable values, and the specific input, as a specific witness of executing the cryptographic program, and (d) stores the specific witness in the local witness buffer in the cryptographic engine;
• wherein the specific witness has a data size exceeding a maximum supported memory access bandwidth of the host memory for a single clock cycle;
• wherein the proof generator in the cryptographic engine (e) receives, from the host processor, a proving key that was generated along with a verification key, (f) accesses the specific witness in the local witness buffer in the cryptographic engine, wherein the specific witness is accessed in its entirety by the proof generator over first clock cycles fewer than second clock cycles over which the host memory stored data of the same data size is accessed from the host memory and (g) generates a specific proof for executing the cryptographic program with a combination of the proving key, the specific witness and the specific input;
• wherein a recipient computing system that receives the verification key and the specific proof validates the specific proof with the verification key.

A method comprising:

• wherein a local witness buffer in a cryptographic processor is separate from host memory, the local witness buffer accessed by a host processor operating with the cryptographic processor in a proving computing system;
• wherein the cryptographic processor combines a witness generator, a proof generator and the local witness buffer into a semiconductor device, the cryptographic processor is separate from the host processor;
• receiving, by the witness generator from the host processor, compiled code of a cryptographic program and specific input to the cryptographic program;
• executing, by the witness generator, the cryptographic program by way of executing the compiled code;
• recording, by the witness generator, specific output generated from the cryptographic program, intermediate variable values, and the specific input, as a specific witness of executing the cryptographic program;
• storing, by the witness generator, the specific witness in the local witness buffer;
• wherein the specific witness has a data size exceeding a maximum supported memory access bandwidth of the host memory for a single clock cycle;
• receiving, by the proof generator from the host processor, a proving key that was generated along with a verification key;
• accessing, by the proof generator, the specific witness in the local witness buffer, wherein the specific witness is accessed in its entirety by the proof generator over first clock cycles fewer than second clock cycles over which host memory stored data of the same data size is accessed from the host memory;
• generating, by the proof generator, a specific proof for executing the cryptographic program with a combination of the proving key, the specific witness and the specific input;
• causing a recipient computing system that receives the verification key and the specific proof to validate the specific proof with the verification key.