Error detection and compensation for a multiplexing transmitter
AssigneeMACOM Technology Solutions Holdings, Inc.
InventorsNaga Rajesh Doppalapudi, Echere Iroaga
Life of this patent
Estimating the term…
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AssigneeMACOM Technology Solutions Holdings, Inc.
InventorsNaga Rajesh Doppalapudi, Echere Iroaga
Estimating the term…
Various aspects provide for error detection and compensation for a multiplexing transmitter. For example, a system can include an error detector circuit and a duty cycle correction circuit. The error detector circuit is configured to measure duty cycle error for a clock associated with a transmitter to generate error detector output based on a clock pattern for output generated by the transmitter in response to a defined bit pattern. The duty cycle correction circuit is configured to adjust the clock associated with the transmitter based on the error detector output. Additionally or alternatively, the error detector circuit is configured to measure quadrature error between an in-phase clock and a quadrature clock in response to the defined bit pattern. Additionally or alternatively, the system can include a quadrature error correction circuit configured to adjust phase shift between the in-phase clock and the quadrature clock based on quadrature error.
A system for reducing error associated with a transmitter, comprising:
A system for reducing errors associated with a transmitter, comprising:
A system for reducing error associated with a transmitter, comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.