High frequency switch and semiconductor device
AssigneesKabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
InventorTakayuki Teraguchi
Life of this patent
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Abstract
According to an embodiment, an SPnT-type high frequency switch includes a plurality of first MOS transistors, second MOS transistors, and a capacitor. The plurality of first MOS transistors are connected in series between one of a plurality of RF terminals and an RF common terminal. The second MOS transistors have ends each connected to adjacent first MOS transistors among the first MOS transistors. The capacitor is connected between ground and another end of a second MOS transistor having one end connected to another end of a first MOS transistor having one end connected to the one of the RF terminals among the first and second MOS transistors.
Claims10
A high frequency switch of a single pole n throw (SPnT) type having n (n is an integer greater than or equal to 2) RF terminals and one RF common terminal, the high frequency switch comprising:
- m (m is an integer greater than or equal to 2) first MOS transistors connected in series between one of the n RF terminals and the RF common terminal;
- (m−1) second MOS transistors having ends each connected to adjacent first MOS transistors among the m first MOS transistors;
- and
- a capacitor connected between ground and another end of a second MOS transistor having one end connected to another end of a first MOS transistor having one end connected to the one of the RF terminals among the first and second MOS transistors.
A semiconductor device comprising:
- a high frequency switch circuit of a single-pole-n-throw (SPnT) type having n (n is an integer greater than or equal to 2) RF terminals and one RF common terminal;
- and
- a controller,
- the high frequency switch circuit including:
- m (m is an integer greater than or equal to 2) first MOS transistors connected in series between one of the n RF terminals and the RF common terminal;
- (m−1) second MOS transistors having ends each connected to adjacent first MOS transistors among the m first MOS transistors;
- and
- a capacitor connected between ground and another end of a second MOS transistor having one end connected to another end of a first MOS transistor having one end connected to the one of the RF terminals among the first and second MOS transistors, and
- the controller being configured to output a control signal to the m first MOS transistors and the (m−1) second MOS transistors to perform switching so that an on or off state of the m first MOS transistors and an on or off state of the (m−1) second MOS transistors are different from each other.
Dependencies are inferred from the claim text.