Dual mode power control circuits for RF transmitters

A method of operating a transmission device of a wireless communication system, the method comprising:

• supplying an RF signal from a signal source to an RF signal path;
• supplying an attenuation control signal and a mode signal to a dual-mode analog variable gain attenuator (AVGA) of the RF signal path, the mode signal having one of a first value and a second value;
• attenuating the RF signal based on an attenuation value indicated by the attenuation control signal and based on a control mode indicated by the mode signal using the dual-mode AVGA;
• supplying the RF signal to an RF directional coupler, the RF directional coupler generating an output RF signal and a coupled RF signal from the RF signal;
• supplying the coupled RF signal to a power detector, the power detector being configured to generate a detector output signal based on the coupled RF signal and a setpoint voltage signal;
• supplying the mode control signal, the detector output signal, and a voltage control signal to a switch circuit;
• in response to the mode signal having the first value, supplying the voltage control signal as an AGC control voltage from the switch circuit to the dual-mode AVGA as the attenuation control signal;
• in response to the mode signal having the second value, supplying the voltage control signal as an ALC reference voltage from the switch circuit to the power detector as the setpoint voltage signal, and supplying the detector output signal from the switch circuit to the dual-mode AVGA as the attenuation control signal;
• and
• when the setpoint voltage signal corresponds to the ALC reference voltage, generating the detector output signal at the power detector such that the detector output signal has a voltage indicative of the attenuation value required to bring the output RF signal in line with the ALC reference voltage.

A power amplifier for a transmitter of a communication system, the power amplifier comprising:

• a radio frequency (RF) signal path including:
• a signal source configured to generate an RF signal;
• a dual-mode analog variable gain attenuator (AVGA) electrically coupled to receive (i) the RF signal, (ii) an attenuation control signal, and (iii) a mode signal, the dual-mode AVGA being configured to attenuate the RF signal based on an attenuation value indicated by the attenuation control signal, the mode signal indicating a control mode to be used by the dual-mode AVGA to determine the attenuation value based on the attenuation control signal;
• and
• an RF directional coupler electrically coupled to receive the RF signal from the dual-mode AVGA and to output an output RF signal and a coupled RF signal based on, the coupled RF signal being indicative of the output RF;
• and
• a power control circuit including:
• a square law power detector electrically coupled to receive (i) the coupled RF signal and (ii) a setpoint voltage signal and to generate a detector output signal based on the coupled RF signal and the setpoint voltage signal;
• and
• a switch circuit electrically coupled to receive (i) the mode control signal, (ii) the detector output signal, and (iii) a voltage control signal,
• wherein the mode signal has one of a first value indicating an open-loop automatic gain control (AGC) mode of operation for the power control circuit and a second value indicating an automatic level control (ALC) mode of operation for the power control circuit,
• wherein, when the power control circuit is operated in the AGC mode, the voltage control signal corresponds to an AGC control voltage,
• wherein, when the power control circuit is operated in the ALC mode, the voltage control signal corresponds to an ALC reference voltage,
• wherein, in response to the mode control signal having the first value, the switch circuit supplies the AGC control voltage to the dual-mode AVGA as the attenuation control signal,
• wherein, in response to the mode control signal having the second value, the switching circuit supplies the ALC reference voltage to the square law power detector as the setpoint voltage signal and supplies the detector output signal to the dual-mode AVGA as the attenuation control signal, and
• wherein, when the setpoint voltage signal corresponds to the ALC reference voltage, the square law power detector is configured to generate the detector output signal such that the detector output signal has a voltage indicative of the attenuation value required to bring the output RF signal in line with the ALC reference voltage.