Active splitting amplifier circuit

A receiver, comprising:

• an amplifier circuit, wherein the amplifier circuit includes:
• a first common-source amplifier having an input and an output;
• and
• a first common-gate amplifier having an input and an output, wherein the input of the first common-gate amplifier is coupled to the output of the first common-source amplifier;
• a first switch circuit having a first input, a second input, and an output, wherein the first input of the first switch circuit is coupled to the output of the first common-gate amplifier, and the second input of the first switch circuit is coupled to the output of the first common-source amplifier;
• a second switch circuit having a first input, a second input, and an output, wherein the first input of the second switch circuit is coupled to the output of the first common-gate amplifier, and the second input of the second switch circuit is coupled to the output of the first common-source amplifier;
• and
• an attenuator, wherein the attenuator is coupled between the output of the first common-source amplifier and the first input of the first switch circuit, and the attenuator is coupled between the output of the first common-source amplifier and the first input of the second switch circuit.

A receiver, comprising:

• an amplifier circuit, wherein the amplifier circuit includes:
• a first common-source amplifier having an input and an output;
• and
• a first common-gate amplifier having an input and an output, wherein the input of the first common-gate amplifier is coupled to the output of the first common-source amplifier;
• a first switch circuit having a first input, a second input, and an output, wherein the first input of the first switch circuit is coupled to the output of the first common-gate amplifier, and the second input of the first switch circuit is coupled to the output of the first common-source amplifier;
• a second switch circuit having a first input, a second input, and an output, wherein the first input of the second switch circuit is coupled to the output of the first common-gate amplifier, and the second input of the second switch circuit is coupled to the output of the first common-source amplifier;
• and
• a splitter having an input, a first output, and a second output, wherein the input of the splitter is coupled to the output of the first common-gate amplifier, the first output of the splitter is coupled to a third input of the first switch circuit, and the second output of the splitter is coupled to a third input of the second switch circuit.

A method for wireless communications, comprising:

• receiving multiple signals via an antenna;
• passing the multiple signals through a first gain path, the first gain path including a common-source amplifier and a common-gate amplifier;
• passing the multiple signals through a second gain path, the second gain path including the common-source amplifier and excluding the common-gate amplifier;
• in a first mode, routing the multiple signals passing through the first gain path to a first receive chain and routing the multiple signals passing through the second gain path to a second receive chain;
• in a second mode, routing the multiple signals passing through the first gain path to the second receive chain and routing the multiple signals passing through the second gain path to the first receive chain;
• in a third mode, splitting the multiple signals passing through the first gain path into a first split signal and a second split signal;
• attenuating the first split signal by a first attenuation;
• and
• attenuating the second split signal by a second attenuation, wherein the second attenuation is different from the first attenuation.

A receiver, comprising:

• an amplifier circuit, wherein the amplifier circuit includes:
• a first transistor having a source, a gate, and a drain;
• a second transistor having a source, a gate, and a drain, wherein the source of the second transistor is coupled to the drain of the first transistor, and the gate of the second transistor is coupled to a bias circuit;
• a third transistor having a source, a gate, and a drain;
• a fourth transistor having a source, a gate, and a drain, wherein the source of the fourth transistor is coupled to the drain of the third transistor, and the gate of the fourth transistor is coupled to the bias circuit;
• a load coupled to the drain of the second transistor and the drain of the fourth transistor;
• wherein an input of the amplifier circuit is coupled to the gate of the first transistor and the gate of the third transistor, a first output of the amplifier circuit is coupled to the load, and a second output of the amplifier circuit is coupled between the drain of the first transistor and the source of the second transistor;
• a first switch circuit having a first input, a second input, and an output, wherein the first input of the first switch circuit is coupled to the first output of the amplifier circuit, and the second input of the first switch circuit is coupled to the second output of the amplifier circuit;
• and
• a second switch circuit having a first input, a second input, and an output, wherein the first input of the second switch circuit is coupled to the first output of the amplifier circuit, and the second input of the second switch circuit is coupled to the second output of the amplifier circuit;
• and
• a splitter having an input, a first output, and a second output, wherein the input of the splitter is coupled to the load, the first output of the splitter is coupled to a third input of the first switch circuit, and the second output of the splitter is coupled to a third input of the second switch circuit.