Integrated circuit and method of synchronous rectification control of bridgeless power factor correction circuit

An integrated circuit that performs synchronous rectification control of a bridgeless interleaved power factor correction circuit in a critical mode comprising:

• a bridgeless interleaved power factor correction circuit of a critical mode comprising:
• a first diode;
• a second diode electrically connected in series with the first diode;
• an output smoothing capacitor electrically connected to the first diode and the second diode;
• an AC power supply that includes a first terminal and a second terminal and is electrically connected to the first diode and the second diode;
• a first reactor that includes a first terminal and a second terminal and is connected to the second terminal of the AC power supply;
• a second reactor that includes a first terminal and a second terminal, is connected to the second terminal of the AC power supply, and is connected in parallel with the first reactor;
• a first half-bridge circuit including a first NMOSFET and a second NMOSFET on a master side, wherein the second terminal of the first reactor is electrically connected to a connection point between the first NMOSFET and the second NMOSFET;
• a second half-bridge circuit including a third NMOSFET and a fourth NMOSFET on a slave side, wherein the second terminal of the second reactor is electrically connected to a connection point between the third NMOSFET and the fourth NMOSFET;
• and
• a differentiation circuit that includes a capacitor and a resistor and is connected between main electrodes of the second NMOSFET of the first half-bridge circuit;
• wherein
• the integrated circuit detects an output voltage of the output smoothing capacitor, compares the output voltage with a predetermined reference voltage, and controls the first half-bridge circuit and the second half-bridge circuit to be on and off based on an error signal between the output voltage and the predetermined reference voltage,
• a next ON time of a synchronous rectification switch operation of the first half-bridge circuit is assigned based on a measured time comprising a period between OFF timing of an active switch of the half-bridge circuit and timing of an output of a differentiation signal generated by the differentiation circuit.

An integrated circuit for synchronous rectification control of a bridgeless interleaved power factor correction circuit in a critical mode comprising:

• a bridgeless interleaved power factor correction circuit of a critical mode comprising:
• an AC power supply including a first terminal and a second terminal;
• an output smoothing capacitor connected in parallel with the AC power supply;
• a first reactor that includes a first terminal and a second terminal and is connected to the second terminal of the AC power supply;
• a first reactor that includes a first terminal and a second terminal and is connected to the second terminal of the AC power supply;
• a second reactor that includes a first terminal and a second terminal, is connected to the second terminal of the AC power supply, and is connected in parallel with the first reactor;
• a first half-bridge circuit including a first NMOSFET and a second NMOSFET on a master side, wherein the second terminal of the first reactor is electrically connected to the connection point between the first NMOSFET and the second NMOSFET;
• a second half-bridge circuit including a third NMOSFET and a fourth NMOSFET on a slave side, wherein the second terminal of the second reactor is electrically connected to a connection point between the third NMOSFET and the fourth NMOSFET;
• and
• a differentiation circuit that includes a capacitor and a resistor and is connected between main electrodes of the second NMOSFET of the first half-bridge circuit;
• wherein
• the integrated circuit detects an output voltage of the output smoothing capacitor, compares the output voltage with a predetermined reference voltage, and controls the first half-bridge circuit and the second half-bridge circuit to be on and off based on an error signal between the output voltage and the predetermined reference voltage;
• an ON time of a synchronous rectification switch operation of the first half-bridge circuit is assigned to a next ON time of the synchronous rectification switch operation of the second half-bridge circuit by measuring a period between OFF timing of an active switch of the first half-bridge circuit and timing of an output of a differentiation signal generated by the differentiation circuit.

A method of performing synchronous rectification control of a bridgeless interleaved power factor correction circuit of a critical mode comprising:

• detecting an output voltage of the output smoothing capacitor in the bridgeless interleaved power factor correction circuit of the critical mode;
• converting the detected output voltage to a digital value;
• comparing the converted digital value of the detected output voltage with a predetermined reference voltage to generate an ON-time signal by processing an error signal between the converted digital value of the detected output voltage;
• controlling a first half-bridge circuit and a second half-bridge circuit included in the bridgeless interleaved power factor correction circuit of the critical mode to be on and off based on the ON-time signal generated by processing the error signal between the output voltage and the predetermined reference voltage;
• measuring an ON time of a synchronous rectification switch operation of the first half-bridge circuit by measuring a time period between OFF timing of an active switch of the first half-bridge circuit and timing of an output of a differentiation signal generated by a differentiation circuit included in the bridgeless interleaved power factor correction circuit of the critical mode;
• and
• assigning the measured time to a next ON time of the synchronous rectification switch operation of the second half-bridge circuit.