Image sensor with shallow trench edge doping
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYueh-Chuan Lee, Chia-Chan Chen
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Abstract
The present disclosure relates to an integrated chip. The integrated chip includes a gate structure on a substrate. A doped region is within the substrate. One or more dielectric materials are within a recess formed by one or more surfaces of the substrate. The doped region is laterally between the gate structure and the recess. A doped epitaxial material is within the recess and between the one or more dielectric materials and the doped region. The doped epitaxial material is asymmetric about a vertical line that extends through a lateral center of the doped epitaxial material.
Claims20
An integrated chip, comprising:
- a gate structure on a substrate;
- a doped region within the substrate;
- one or more dielectric materials within a recess formed by one or more surfaces of the substrate, the doped region laterally between the gate structure and the recess;
- and
- a doped epitaxial material within the recess and between the one or more dielectric materials and the doped region, wherein the doped epitaxial material is asymmetric about a vertical line that extends through a lateral center of the doped epitaxial material.
An integrated chip, comprising:
- a gate structure disposed on a semiconductor substrate;
- a doped region disposed within the semiconductor substrate;
- one or more dielectric materials arranged directly between sidewalls of the semiconductor substrate;
- and
- a doped material arranged directly between the sidewalls of the semiconductor substrate, wherein the doped material has a first outermost sidewall facing the gate structure and a second outermost sidewall facing the one or more dielectric materials, the first outermost sidewall having a first length and the second outermost sidewall having a second length that is different than the first length.
An integrated chip, comprising:
- a gate structure arranged over a substrate between a photodiode region and a floating diffusion region, the photodiode region and the floating diffusion region being disposed within the substrate;
- one or more sidewall spacers arranged along opposing sides of the gate structure;
- a first well region arranged within the substrate along a side of the photodiode region, wherein the photodiode region is laterally between the first well region and the gate structure;
- one or more dielectric materials disposed within a trench formed by sidewalls of the substrate, the trench separated from the photodiode region by the first well region;
- and
- a doped material disposed within the trench and extending from within the trench to directly above the photodiode region and along an outermost sidewall of the one or more sidewall spacers, wherein the doped material has an outermost sidewall that is arranged within the trench and that faces the one or more dielectric materials within the trench, the outermost sidewall of the doped material being laterally separated from the sidewalls of the substrate by non-zero distances.
Dependencies are inferred from the claim text.