Forming N-type and P-type horizontal gate-all-around devices

A method comprising:

• growing alternating nanosheet layers of a sacrificial material and a channel material in a nanosheet stack on a substrate;
• selectively etching portions of the nanosheet stack and the substrate to form a wider column of remaining portions of the nanosheet stack for an n-type device and at least one narrower column of remaining portions of the nanosheet stack for a p-type device;
• forming more than one shallow trench isolation in the substrate;
• forming a dummy gate around and above each of remaining portions of a plurality of channel nanosheet layers in the more than one remaining portions of the nanosheet stack for both the n-type device and the p-type device;
• forming a protective spacer around a top portion of the dummy gate;
• forming an inner spacer abutting a remaining portion of each of a plurality of sacrificial nanosheet layers in the remaining portions of the nanosheet stack;
• growing source/drains abutting outer edges of the remaining portions of the nanosheet stack and the inner spacers for both the n-type device and the p-type device;
• removing the dummy gates and each of the remaining portions of a plurality of sacrificial nanosheets in the nanosheet stack;
• depositing and patterning a softmask over the p-type device;
• selectively trimming each of remaining portions of the plurality of the channel nanosheet layers exposed in the remaining portions of the nanosheet stack in only the n-type device;
• removing the softmask;
• and
• forming a metal replacement gate around and above each of the remaining portions of the plurality of channel nanosheet layers and abutting vertical sides of each inner spacer for both the n-type device and the p-type device, wherein the n-type device forms an n-type field-effect transistor horizontal gate-all-around device and the p-type device forms a p-type field-effect transistor horizontal gate-all-around device.