Modification of a command timing pattern
AssigneeMicron Technology, Inc.
InventorsCarl L. Minifie, Phong T. Nguyen, Alexander A. Tomaso
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AssigneeMicron Technology, Inc.
InventorsCarl L. Minifie, Phong T. Nguyen, Alexander A. Tomaso
Estimating the term…
Methods, systems, and devices for modification of a command timing pattern are described. A host device may transmit (e.g., issue), to a memory device, a quantity of deselect commands between activation or data access commands to satisfy configured timing constraints. Each deselect command may indicate a polarity (e.g., a high voltage or a low voltage) for a command and address (CA) pin at the memory device. In some examples, the quantity of deselect commands may include one or more sequences of deselect commands (e.g., low-high-high-high). The host device may truncate a sequence of deselect commands, for example to satisfy timing constraints without transmitting additional unnecessary commands. By dynamically configuring the quantity of deselect commands, the host device may improve latency and overall efficiency of system operations without violating the configured timing constraints.
A method, comprising:
A method, comprising:
An apparatus, comprising:
An apparatus, comprising:
A non-transitory computer-readable medium storing code, the code comprising instructions executable by a processor to:
Dependencies are inferred from the claim text.