Sense amplifier circuit and data read method

A sense amplifier circuit, comprising:

• a first P-type transistor connected between a first signal terminal and a second complementary read bit line, the first P-type transistor having a control terminal connected to a first read bit line connected to a bit line;
• a second P-type transistor connected between a second signal terminal and a second read bit line, the second P-type transistor having a control terminal connected to a first complementary read bit line connected to a complementary bit line;
• a first N-type transistor connected between a third signal terminal and the second complementary read bit line, the first N-type transistor having a control terminal connected to the first read bit line;
• a second N-type transistor connected between a fourth signal terminal and the second read bit line, the second N-type transistor having a control terminal connected to the first complementary read bit line;
• a first offset cancellation subcircuit configured to connect the first read bit line to the second complementary read bit line in response to a first offset cancellation signal;
• a second offset cancellation subcircuit configured to connect the first complementary read bit line to the second read bit line in response to a second offset cancellation signal;
• a first write-back subcircuit configured to connect the first complementary read bit line to the second complementary read bit line in response to a first write-back signal;
• and
• a second write-back subcircuit configured to connect the first read bit line to the second read bit line in response to a second write-back signal.